DS1682S Maxim Integrated Products, DS1682S Datasheet - Page 6

• Manufacturer Part Number: DS1682S
• Description: IC TIMEKEEPER ALARM ELAPSE 8SOIC
• Manufacturer: Maxim Integrated Products
• Type: Elapsed Time Counterr

Specifications of DS1682S

• Memory Size: 10B
• Time Format: Binary
• Date Format: Binary
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

EVENT LOGGING
When the DS1682 is powered up, the event time and count values recorded in the EEPROM are
transferred to the ETC and event counter, and the device waits for an event. When an event triggers the
input by transitioning the EVENT pin from a low to a high level, the following occurs:
1) The RC oscillator starts.
2) The alarm, ETC, and event counter are transferred from EEPROM to RAM.
3) Note: Reading the RAM during the transfer results in invalid data.
4) After t
5) The ETC increments every TEI. The ETC holds time in quarter-second resolution.
6) When the EVENT pin goes low, the event counter increments, the oscillator stops, and the ETC and
The ETC stops counting and does not roll over once FFFFFFFFh, or approximately 34 years, is reached.
See Figure 5 for timing.
Figure 5. Event Input Timing
DEVICE SETUP
Once installed in a system, the DS1682 can be programmed to record events as required by the
application, and can be tested by generating events and monitoring the results. Afterwards, it can be
“locked” to prevent alteration of the event and alarm registers and the alarm condition.
The following is a typical sequence:
1) Write the configuration register, alarm registers, and user memory to the desired values.
2) Write-protect the alarm, ETC, and event counter registers with the write disable command if needed.
3) Write-protect the user memory with the write-memory-disable command, if needed.
4) Issue a reset (described in the Reset Command section).
The alarm, ETC and event counter registers, and user memory, once locked, cannot be changed.
Upon reset, the ETC and event counter registers are cleared. The device clears the RE bit, and the
configuration register becomes read-only. Additional resets are ignored.
but not the ETC (zero-length event).
event counter are transferred to EEPROM. The 2-wire bus is not available for t
ES
, the ETC increments. An event greater than t
6 of 14
G
but less than t
ES
increments the event counter
EW
.