MAX5865ETM+T Maxim Integrated Products, MAX5865ETM+T Datasheet - Page 3
![IC ANLG FRONT END 40MSPS 48-TQFN](/photos/6/50/65028/48-qfn_21-0141_sml.jpg)
MAX5865ETM+T
Manufacturer Part Number
MAX5865ETM+T
Description
IC ANLG FRONT END 40MSPS 48-TQFN
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX5865ETM.pdf
(26 pages)
Specifications of MAX5865ETM+T
Number Of Bits
10
Number Of Channels
4
Power (watts)
2.10W
Voltage - Supply, Analog
2.7 V ~ 3.3 V
Voltage - Supply, Digital
1.8 V ~ 3.3 V
Package / Case
48-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ELECTRICAL CHARACTERISTICS (continued)
(V
DAC output amplitude = 0dBFS, differential ADC input, differential DAC output, C
otherwise noted. Typical values are at T
ADC DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
DC Gain Matching
Offset Matching
Gain Temperature Coefficient
Power-Supply Rejection
ADC ANALOG INPUT
Input Differential Range
Input Common-Mode Voltage
Range
Input Impedance
ADC CONVERSION RATE
Maximum Clock Frequency
Data Latency
ADC DYNAMIC CHARACTERISTICS (Note 3)
Signal-to-Noise Ratio
Signal-to-Noise and Distortion
Ratio
Spurious-Free Dynamic Range
Third-Harmonic Distortion
Intermodulation Distortion
Third-Order Intermodulation
Distortion
Total Harmonic Distortion
DD
= 3V, OV
PARAMETER
DD
= 1.8V, internal reference (1.024V), C
_______________________________________________________________________________________
Performance, 40Msps Analog Front End
SYMBOL
A
SINAD
PSRR
SFDR
= +25°C, unless otherwise noted.) (Note 1)
DNL
f
SNR
HD3
THD
IMD
IM3
INL
R
C
V
CLK
ID
IN
IN
Ultra-Low-Power, High-Dynamic-
No missing codes over temperature
Residual DC offset error
Includes reference error
Offset error (V
Gain error (V
Differential or single-ended inputs
Switched capacitor load
(Note 2)
Channel I
Channel Q
f
f
f
f
f
f
f
f
f
f
f
f
IN
IN
IN
IN
IN
IN
IN
IN
1
1
IN
IN
= 2MHz, -7dBFS; f
= 2MHz, -7dBFS; f
= 5.5MHz
= 20MHz
= 5.5MHz
= 20MHz
= 5.5MHz
= 20MHz
= 5.5MHz
= 20MHz
= 5.5MHz
= 20MHz
L
≈ 10pF on all digital outputs, f
DD
DD
CONDITIONS
±5%)
±5%)
2
2
= 2.01MHz, -7dBFS
= 2.01MHz, -7dBFS
REFP
CLK
= C
= 40MHz, ADC input amplitude = -0.5dBFS,
REFN
= C
46.5
MIN
47
58
COM
8
= 0.33µF, Xcvr mode, unless
V
±0.512
±0.15
±0.15
±0.22
±0.48
±0.03
±0.07
-75.4
TYP
±0.2
DD
48.5
48.2
48.4
48.2
±42
120
-75
-66
-70
-71
-70
5.5
±3
70
70
5
5
/ 2
±0.25
MAX
-57
±5
±5
40
ppm/°C
UNITS
cycles
Clock
%FS
%FS
MHz
LSB
LSB
LSB
LSB
dBc
dBc
dBc
dBc
dBc
Bits
dB
kΩ
pF
dB
dB
V
V
3