MCP3201-CI/ST Microchip Technology, MCP3201-CI/ST Datasheet - Page 21

• Manufacturer Part Number: MCP3201-CI/ST
• Description: IC ADC 12BIT 2.7V 1CH SPI 8TSSOP
• Manufacturer: Microchip Technology

Specifications of MCP3201-CI/ST

• Data Interface: Serial, SPI™
• Number Of Bits: 12
• Sampling Rate (per Second): 100k
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP
• Resolution (bits): 12bit
• Sampling Rate: 100kSPS
• Input Channel Type: Pseudo Differential
• Supply Voltage Range - Analog: 2.7V To 5.5V
• Supply Current: 300µA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.0
6.1
With most microcontroller SPI ports, it is required to
clock out eight bits at a time. If this is the case, it will be
necessary to provide more clocks than are required for
the MCP3201. As an example,
Figure 6-2
interfaced to a microcontroller with a standard SPI port.
Since the MCP3201 always clocks data out on the
falling edge of clock, the MCU SPI port must be
configured to match
(clock idles low) and SPI Mode 1,1 (clock idles high)
are both compatible with the
depicts the operation shown in SPI Mode 0,0, which
requires that the CLK from the microcontroller idles in
the ‘low’ state. As shown in the diagram, the MSB is
clocked out of the A/D Converter on the falling edge of
the third clock pulse. After the first eight clocks have
FIGURE 6-1:
FIGURE 6-2:
© 2008 Microchip Technology Inc.
D
CLK
D
OUT
CS
CLK
OUT
CS
APPLICATIONS INFORMATION
Using the MCP3201 Device with
Microcontroller SPI Ports
HI-Z
HI-Z
show how the MCP3201 device can be
Data stored into MCU receive register
after transmission of first 8 bits
?
Data stored into MCU receive register
after transmission of first 8 bits
1
?
1
?
2
?
2
NULL
NULL
BIT B11 B10
0
BIT
SPI Communication using 8-bit segments (Mode 0,0: SCLK idles low).
SPI Communication using 8-bit segments (Mode 1,1: SCLK idles high).
3
0
this operation. SPI Mode 0,0
3
B11 B10 B9
B11 B10 B9
B11 B10 B9
4
4
5
MCP3201.
5
B9
6
6
B8
B8
Figure 6-1
7
B8
B8
7
B7
B7
8
B7
Figure 6-1
B7
8
B6
Data stored into MCU receive register
after transmission of second 8 bits
B6 B5
and
B6 B5
9
B6
Data stored into MCU receive register
after transmission of second 8 bits
9
B5
10
B5
10
B4
B4
11
B4
B4 B3
11
B3
B3
12
B3
been sent to the device, the microcontroller’s receive
buffer will contain two unknown bits (the output is at
high-impedance for the first two clocks), the null bit and
the highest order five bits of the conversion. After the
second eight clocks have been sent to the device, the
MCU receive register will contain the lowest-order
seven bits and the B1 bit repeated as the A/D
Converter has begun to shift out LSB first data with the
extra clock. Typical procedure would then call for the
lower-order byte of data to be shifted right by one bit to
remove the extra B1 bit. The B7 bit is then transferred
from the high-order byte to the lower-order byte, and
then the higher-order byte is shifted one bit to the right
as well. Easier manipulation of the converted data can
be obtained by using this method.
Figure 6-2
which requires that the clock idles in the high state. As
with mode 0,0, the A/D Converter outputs data on the
falling edge of the clock and the MCU latches data from
the A/D Converter in on the rising edge of the clock.
12
B2
B2
13
B2 B1
B2 B1
13
B1
B1
14
14
B0
B0
shows the same thing in SPI Mode 1,1
15
B0
B0
15
B1
B1
16
B1
16
B1
B2
HI-Z
HI-Z
LSB first data begins
to come out
Data is clocked out of A/D
Converter on falling edges
MCU latches data from A/D
Converter on rising edges of SCLK
MCU latches data from A/D
Converter on rising edges of SCLK
Data is clocked out of A/D
Converter on falling edges
LSB first data begins
to come out
MCP3201
DS21290E-page 21