AD9280ARSZ Analog Devices Inc, AD9280ARSZ Datasheet
AD9280ARSZ
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AD9280ARSZ Summary of contents
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FEATURES CMOS 8-Bit 32 MSPS Sampling A/D Converter Pin-Compatible with AD876-8 Power Dissipation Supply) Operation Between +2.7 V and +5.5 V Supply Differential Nonlinearity: 0.2 LSB Power-Down (Sleep) Mode Three-State Outputs Out-of-Range Indicator Built-In Clamp ...
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AD9280–SPECIFICATIONS Parameter RESOLUTION CONVERSION RATE DC ACCURACY Differential Nonlinearity Integral Nonlinearity Offset Error Gain Error REFERENCE VOLTAGES Top Reference Voltage Bottom Reference Voltage Differential Reference Voltage 1 Reference Input Resistance ANALOG INPUT Input Voltage Range Input Capacitance Aperture Delay Aperture ...
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Parameter DIGITAL INPUTS High Input Voltage Low Input Voltage DIGITAL OUTPUTS High-Z Leakage Data Valid Delay Data Enable Delay Data High-Z Delay LOGIC OUTPUT (with DRVDD = 3 V) High Level Output Voltage ( High Level ...
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AD9280 ABSOLUTE MAXIMUM RATINGS* With Respect Parameter to Min AVDD AVSS –0.3 DRVDD DRVSS –0.3 AVSS DRVSS –0.3 AVDD DRVDD –6.5 MODE AVSS –0.3 CLK AVSS –0.3 Digital Outputs DRVSS –0.3 AIN AVSS –0.3 VREF AVSS –0.3 REFSENSE AVSS –0.3 ...
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SSOP Pin No REV. E PIN CONFIGURATION 28-Lead Wide Body (SSOP) AVSS ...
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AD9280 DEFINITIONS OF SPECIFICATIONS Integral Nonlinearity (INL) Integral nonlinearity refers to the deviation of each individual code from a line drawn from “zero” through “full scale.” The point used as “zero” occurs 1/2 LSB before the first code transi- tion. ...
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AMPLITUDE –50 –55 –6.0 AMPLITUDE –60 –65 –0.5 AMPLITUDE –70 1.00E+05 1.00E+06 1.00E+07 INPUT FREQUENCY – Hz Figure 7. THD vs. Input Frequency –80 –70 AIN = –0.5dBFS –60 –50 –40 –30 –20 –10 0 ...
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AD9280 0 –3 –6 –9 –12 –15 –18 –21 –24 1.0E+6 1.0E+7 1.0E+8 FREQUENCY – Hz Figure 13. Full Power Bandwidth –10 –20 –30 –40 –50 0 0.5 1.0 1.5 INPUT VOLTAGE – V ...
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SUMMARY OF MODES VOLTAGE REFERENCE 1 V Mode the internal reference may be set connect- ing REFSENSE and VREF together Mode the internal reference my be set connecting REFSENSE to ...
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AD9280 +FS AD9280 AIN –FS SHA +F/S RANGE OBTAINED FROM VREF PIN OR 10k EXTERNAL REF 10k REFTS A2 REFBS A/D 10k CORE –F/S RANGE OBTAINED FROM 10k VREF PIN OR EXTERNAL REF a. Top/Bottom Mode MAXIMUM MAGNITUDE OF V ...
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The actual reference voltages used by the internal circuitry of the AD9280 appear on REFTF and REFBF. For proper opera- tion necessary to add a capacitor network to decouple these pins. The REFTF and REFBF should be decoupled ...
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AD9280 EXTERNAL REFERENCE OPERATION Using an external reference may provide more flexibility and improve drift and accuracy. Figures 21 through 23 show ex- amples of how to use an external reference with the AD9280. To use an external reference, the ...
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The allowable voltage range that can be applied to CLAMPIN depends on the operational limits of the internal clamp ampli- fier. The recommended clamp range is between 0.5 volts and 2.0 volts. The input capacitor should be sized to allow ...
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AD9280 DRIVING THE ANALOG INPUT Figure 25 shows the equivalent analog input of the AD9280, a sample-and-hold amplifier (switched capacitor input SHA). Bringing CLK to a logic low level closes Switches 1 and 2 and opens Switch 3. The input ...
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DIFFERENTIAL INPUT OPERATION The AD9280 will accept differential input signals. This function may be used by shorting REFTS and REFBS and driving them as one leg of the differential signal (the top leg is driven into AIN). In the configuration ...
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AD9280 APPLICATIONS DIRECT IF DOWN CONVERSION USING THE AD9280 Sampling IF signals above an ADC’s baseband region (i.e /2) is becoming increasingly popular in communication S applications. This process is often referred to as Direct IF Down ...
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Figures 35–38 combine the dual-tone SFDR as well as single tone SFDR and SNR performance at IF frequencies of 45 MHz, 70 MHz, 85 MHz and 135 MHz. Note, the SFDR vs. ampli- tude data is referenced to dBFS while ...
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AD9280 R10 5k +3–5A TP14 AD822 R7 5.49k 2 XXXX ADJ 10k CW C8 AD1580 10/10V R9 1.5k XXXX ADJ JP5 R37 1k R53 49.9 JP17 R38 1k GND JP18 R39 1k AVDD C16 C19 ...
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JP1 AVDD C3 JP2 0.1 F TP1 C5 10/10V JP9 JP3 JP4 VREF B TP5 JP11 TP6 A JP6 JP12 C35 10/10V TP7 JP13 JP7 T1– ...
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AD9280 Figure 40a. Evaluation Board, Component Signal (Not to Scale) Figure 40b. Evaluation Board, Solder Signal (Not to Scale) –20– REV. E ...
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Figure 40c. Evaluation Board Power Plane (Not to Scale) Figure 40d. Evaluation Board Ground Plane (Not to Scale) REV. E –21– AD9280 ...
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AD9280 Figure 40e. Evaluation Board Component Silk (Not to Scale) Figure 40f. Evaluation Board Solder Silk (Not to Scale) C33 C6 C18 C19 C16 C17 –22– REV. E ...
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GROUNDING AND LAYOUT RULES As is the case for any high performance device, proper ground- ing and layout techniques are essential in achieving optimal performance. The analog and digital grounds on the AD9280 have been separated to optimize the management ...
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... Model Temperature Range AD9280ARS −40°C to +85°C AD9280ARSRL −40°C to +85°C AD9280ARSZ −40°C to +85°C AD9280ARSZRL −40°C to +85°C AD9280- RoHS Compliant Part Shrink Small Outline. REVISION HISTORY 8/10—Rev Rev. E Changes to Pin Configuration and Pin Function Descriptions .. 5 Updated Outline Dimensions ...