AD9280ARSZ Analog Devices Inc, AD9280ARSZ Datasheet - Page 8
![IC ADC CMOS 8BIT 32MSPS 28-SSOP](/photos/6/60/66033/505-28-ssop_sml.jpg)
AD9280ARSZ
Manufacturer Part Number
AD9280ARSZ
Description
IC ADC CMOS 8BIT 32MSPS 28-SSOP
Manufacturer
Analog Devices Inc
Datasheet
1.AD9280ARSZ.pdf
(24 pages)
Specifications of AD9280ARSZ
Data Interface
Parallel
Number Of Bits
8
Sampling Rate (per Second)
32M
Number Of Converters
9
Power Dissipation (max)
110mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP (0.200", 5.30mm Width)
Resolution (bits)
8bit
Sampling Rate
32MSPS
Input Channel Type
Differential, Single Ended
Supply Voltage Range - Analog
2.7V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9280-EB - BOARD EVAL FOR AD9280
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9280ARSZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD9280ARSZRL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD9280
Modes
TOP/BOTTOM
CENTER SPAN AIN
Differential
External Ref
AD876-8
Figure 14. Input Bias Current vs. Input Voltage
–12
–15
–18
–21
–24
–10
–20
–30
–40
–50
–3
–6
–9
1.0E+6
50
40
30
20
10
0
0
0
Figure 13. Full Power Bandwidth
0.5
Input
Connect
AIN
AIN
AIN
AIN Is Input 1
REFTS and
REFBS Are
Shorted Together
for Input 2
AIN
AIN
1.0E+7
1.0
INPUT VOLTAGE – V
FREQUENCY – Hz
1.5
Input
Span
1 V
2 V
1 V
2 V
1 V
2 V
2 V max AVDD
2 V
1.0E+8
2.0
REFBS = 0.5V
REFTS = 2.5V
CLOCK = 32MHz
MODE
Pin
AVDD
AVDD
AVDD/2 Short VREF and REFSENSE Together
AVDD/2 AGND
AVDD/2 Short VREF and REFSENSE Together
AVDD/2 AGND
AGND
Float or
AVSS
2.5
1.0E+9
3.0
Table I. Mode Selection
REFSENSE
Pin
Short REFSENSE, REFTS and VREF Together
AGND
AVDD
AVDD
–8–
APPLYING THE AD9280
THEORY OF OPERATION
The AD9280 implements a pipelined multistage architecture to
achieve high sample rate with low power. The AD9280 distrib-
utes the conversion over several smaller A/D subblocks, refining
the conversion with progressively higher accuracy as it passes
the results from stage to stage. As a consequence of the distrib-
uted conversion, the AD9280 requires a small fraction of the
256 comparators used in a traditional flash type A/D. A sample-
and-hold function within each of the stages permits the first
stage to operate on a new input sample while the second, third
and fourth stages operate on the three preceding samples.
OPERATIONAL MODES
The AD9280 is designed to allow optimal performance in a
wide variety of imaging, communications and instrumentation
applications, including pin compatibility with the AD876-8 A/D.
To realize this flexibility, internal switches on the AD9280 are
used to reconfigure the circuit into different modes. These modes
are selected by appropriate pin strapping. There are three parts
of the circuit affected by this modality: the voltage reference, the
reference buffer, and the analog input. The nature of the appli-
cation will determine which mode is appropriate: the descrip-
tions in the following sections, as well as Table I should assist in
selecting the desired mode.
REF
Short REFTS and VREF Together
No Connect
No Connect
No Connect
No Connect
REFTS
AVDD/2
AVDD/2
AVDD/2
AVDD/2
– REFBS (2 V max)
Short to
VREFTF
VREFTF
Span = REFTS
Short to
AVDD/2 29
REFBS
AGND
AGND
AVDD/2 20
AVDD/2
AVDD/2
Short to
VREFBF
Short to
VREFBF
Figure
18
19
21, 22
23
30
REV. E