ADC122S051CIMM/NOPB National Semiconductor, ADC122S051CIMM/NOPB Datasheet - Page 7

IC ADC 12BIT 2CHAN 500KSPS 8MSOP

ADC122S051CIMM/NOPB

Manufacturer Part Number
ADC122S051CIMM/NOPB
Description
IC ADC 12BIT 2CHAN 500KSPS 8MSOP
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheet

Specifications of ADC122S051CIMM/NOPB

Number Of Bits
12
Sampling Rate (per Second)
500k
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
10mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
Number Of Elements
1
Resolution
12Bit
Architecture
SAR
Sample Rate
500KSPS
Input Polarity
Unipolar
Input Type
Voltage
Rated Input Volt
5.25V
Differential Input
No
Power Supply Requirement
Single
Single Supply Voltage (typ)
3.3/5V
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.25V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Differential Linearity Error
-1LSB/1.3LSB
Integral Nonlinearity Error
±1.1LSB
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Package Type
MSOP
Input Signal Type
Single-Ended
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADC122S051CIMM
ADC122S051CIMMTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADC122S051CIMM/NOPB
Manufacturer:
TI/德州仪器
Quantity:
20 000
Specification Definitions
ACQUISITION TIME is the time required to acquire the input
voltage. That is, it is time required for the hold capacitor to
charge up to the input voltage.
APERTURE DELAY is the time between the fourth falling
SCLK edge of a conversion and the time when the input signal
is acquired or held for conversion.
CONVERSION TIME is the time required, after the input volt-
age is acquired, for the ADC to convert the input voltage to a
digital word.
CROSSTALK is the coupling of energy from one channel into
the other channel, or the amount of signal energy from one
analog input that appears at the measured analog input.
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of
the maximum deviation from the ideal step size of 1 LSB.
DUTY CYCLE is the ratio of the time that a repetitive digital
waveform is high to the total time of one period. The specifi-
cation here refers to the SCLK.
EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE
BITS) is another method of specifying Signal-to-Noise and
Distortion or SINAD. ENOB is defined as (SINAD − 1.76) /
6.02 and says that the converter is equivalent to a perfect
ADC of this (ENOB) number of bits.
FULL POWER BANDWIDTH is a measure of the frequency
at which the reconstructed output fundamental drops 3 dB
below its low frequency value for a full scale input.
FULL SCALE ERROR (FSE) is a measure of how far the last
code transition is from the ideal 1½ LSB below V
defined as:
where V
mum code occurs. FSE can be expressed in Volts, LSB or
percent of full scale range.
GAIN ERROR is the deviation of the last code transition
(111...110) to (111...111) from the ideal (V
ter adjusting for offset error.
INTEGRAL NON-LINEARITY (INL) is a measure of the de-
viation of each individual code from a line drawn from negative
full scale (½ LSB below the first code transition) through pos-
itive full scale (½ LSB above the last code transition). The
deviation of any given code from this straight line is measured
from the center of that code value.
INTERMODULATION DISTORTION (IMD) is the creation of
additional spectral components as a result of two sinusoidal
max
is the voltage at which the transition to the maxi-
V
FSE
= V
max
+ 1.5 LSB – V
REF
REF
+
− 1.5 LSB), af-
REF
+
and is
7
frequencies being applied to the ADC input at the same time.
It is defined as the ratio of the power in the second and third
order intermodulation products to the sum of the power in both
of the original frequencies. IMD is usually expressed in dB.
MISSING CODES are those output codes that will never ap-
pear at the ADC outputs. These codes cannot be reached with
any input value. The ADC122S051 is guaranteed not to have
any missing codes.
OFFSET ERROR is the deviation of the first code transition
(000...000) to (000...001) from the ideal (i.e. GND + 0.5 LSB).
SIGNAL TO NOISE RATIO (SNR) is the ratio, expressed in
dB, of the rms value of the input signal at the converter output
to the rms value of the sum of all other spectral components
below one-half the sampling frequency, not including d.c. or
harmonics included in the THD specification.
SIGNAL TO NOISE PLUS DISTORTION (S/N+D or
SINAD) Is the ratio, expressed in dB, of the rms value of the
input signal to the rms value of all of the other spectral com-
ponents below half the clock frequency, including harmonics
but excluding d.c.
SPURIOUS FREE DYNAMIC RANGE (SFDR) is the differ-
ence, expressed in dB, between the desired signal amplitude
to the amplitude of the peak spurious spectral component,
where a spurious spectral component is any signal present in
the output spectrum that is not present at the input and may
or may not be a harmonic.
TOTAL HARMONIC DISTORTION (THD) is the ratio, ex-
pressed in dB or dBc, of the rms total of the first five harmonic
components at the output to the rms level of the input signal
frequency as seen at the output. THD is calculated as
where A
put and A
harmonic frequencies. Accurate THD measurement requires
a spectrally pure sine wave (monotone) at the ADC input.
THROUGHPUT TIME is the minimum time required between
the start of two successive conversion. It is the acquisition
time plus the conversion and read out times. In the case of
the ADC122S051, this is 16 SCLK periods.
f1
is the RMS power of the input frequency at the out-
f2
through A
f6
are the RMS power in the first 5
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