AD7767BRUZ Analog Devices Inc, AD7767BRUZ Datasheet - Page 2

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AD7767BRUZ

Manufacturer Part Number
AD7767BRUZ
Description
ADC 24BIT 128KSPS SAR 16-TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7767BRUZ

Data Interface
Serial
Number Of Bits
24
Sampling Rate (per Second)
128k
Number Of Converters
1
Power Dissipation (max)
18mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Resolution (bits)
24bit
Sampling Rate
128kSPS
Input Channel Type
Differential, Single Ended
Supply Voltage Range - Analog
2.375V To 2.625V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7767EDZ - BOARD EVAL AD7767 128KSPS 108DBEVAL-AD7767-1EDZ - BOARD EVAL AD7767-1 64KSPS 111DB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD7767
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Related Devices ................................................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 8
Pin Configuration and Function Descriptions ............................. 9
Typical Performance Characteristics ........................................... 10
Terminology .................................................................................... 14
Theory of Operation ...................................................................... 15
REVISION HISTORY
5/10—Rev. B to Rev. C
Changes to Pin 8 Description ......................................................... 9
Changes to Table 8 .......................................................................... 20
3/09—Rev. A to Rev. B
Changes to t
Changes to Table 7 .......................................................................... 17
1/09—Rev. 0 to Rev. A
Changes to Features Section............................................................ 1
Change to Intermodulation Distortion (IMD) Parameter and
Changes to Supply and Reference Voltages Section ................... 16
Changes to Choosing the SCLK Frequency Section .................. 18
Changes to Figure 24 ...................................................................... 12
Changes to Driving the AD7767 Section .................................... 20
Changes to Single-Ended Signal Source Section ........................ 20
Added Figure 41; Renumbered Sequentially .............................. 20
Change to Figure 42 ....................................................................... 21
Added Table 8; Renumbered Sequentially .................................. 20
Replaced V
Replaced Figure 46 ......................................................................... 22
8/07—Revision 0: Initial Version
Timing Specifications .................................................................. 5
Timing Diagrams .......................................................................... 6
ESD Caution .................................................................................. 8
AD7767/AD7767-1/AD7767-2 Transfer Function ................ 15
Converter Operation .................................................................. 15
Analog Input Structure .............................................................. 16
Integral Nonlinearity Parameter, Table 2 ................................. 3
REF+
SETTLING
Input Signal Section ............................................ 22
Parameter, Table 3 .......................................... 5
Rev. C | Page 2 of 24
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
AD7767 Interface ........................................................................... 17
Daisy Chaining ............................................................................... 18
Driving the AD7767 ....................................................................... 20
Outline Dimensions ....................................................................... 23
Supply and Reference Voltages ................................................. 16
Initial Power-Up ......................................................................... 17
Reading Data ............................................................................... 17
Power-Down, Reset, and Synchronization ............................. 17
Reading Data in Daisy-Chain Mode ....................................... 18
Choosing the SCLK Frequency ................................................ 18
Daisy-Chain Mode Configuration and Timing Diagrams ... 19
Differential Signal Source ......................................................... 20
Single-Ended Signal Source ...................................................... 20
Antialiasing ................................................................................. 21
Power Dissipation....................................................................... 21
V
Multiplexing Analog Input Channels ...................................... 22
Ordering Guide .......................................................................... 23
REF+
Input Signal ....................................................................... 22
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

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