LTC2435CGN Linear Technology, LTC2435CGN Datasheet - Page 29

• Manufacturer Part Number: LTC2435CGN
• Description: IC ADC DIFF I/REF 20BIT 16-SSOP
• Manufacturer: Linear Technology

Specifications of LTC2435CGN

• Number Of Bits: 20
• Sampling Rate (per Second): 15
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 1mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP (0.150", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIO S I FOR ATIO
In addition to this gain error, the converter INL perfor-
mance is degraded by the reference source impedance.
When F
100Ω of source resistance driving REF
into about 0.11ppm additional INL error. For the LTC2435,
when F
100Ω of source resistance driving REF
into about 0.092ppm additional INL error; and for the
LTC2435-1 operating with simultaneous 50Hz/60Hz re-
jection, every 100Ω of source resistance leads to an
additional 0.10ppm of additional INL error. When F
driven by an external oscillator with a frequency f
every 100Ω of source resistance driving REF
translates into about 0.73 • 10
error. Figure 25 shows the typical INL error due to the
source resistance driving the REF
large C
resistance on the two reference pins is additive with
respect to this INL error. In general, matching of source
impedance for the REF
gain or the INL error. The user is thus advised to minimize
the combined source impedance driving the REF
REF
The magnitude of the dynamic reference current depends
upon the size of the very stable internal sampling capaci-
tors and upon the accuracy of the converter sampling
clock. The accuracy of the internal clock over the entire
temperature and power supply range is typical better than
0.5%. Such a specification can also be easily achieved by
Figure 23. +FS Error vs R
–
pins rather than to try to match it.
O
O
REF
= HIGH (internal oscillator and 50Hz notch), every
= LOW (internal oscillator and 60Hz notch), every
values are used. The effect of the source
100
90
80
70
60
50
40
30
20
10
0
0
V
V
V
V
V
F
T
O
A
CC
REF
REF
IN
IN
= GND
= 25°C
+
–
U
= 5V
+
–
= 3.75V
= 1.25V
400
= 5V
= GND
+
SOURCE
and REF
U
800
R
SOURCE
–6
at REF
• f
C
1200
(Ω)
–
IN
EOSC
= 1μF, 10μF
pins does not help the
+
+
W
C
IN
and REF
or REF
C
1600
+
+
= 0.01μF
ppm additional INL
IN
or REF
or REF
= 0.1μF
2435 F23
–
2000
–
(Large C
–
–
pins when
+
U
translates
translates
or REF
+
EOSC
REF
O
and
is
)
–
,
an external clock. When relatively stable resistors
(50ppm/°C) are used for the external source impedance
seen by REF
current gain error will be insignificant (about 1% of its
value over the entire temperature and voltage range). Even
for the most stringent applications a one-time calibration
operation may be sufficient.
In addition to the reference sampling charge, the reference
pins ESD protection diodes have a temperature dependent
leakage current. This leakage current, nominally 1nA
(±10nA max), results in a small gain error. A 100Ω source
resistance will create a 0.05μV typical and 0.5μV maxi-
mum full-scale error.
Figure 24. –FS Error vs R
Figure 25. INL vs Differential Input Voltage (V
and Reference Source Resistance (R
REF
–
for Large C
–100
–15
–12
–40
–60
–80
–90
+
–10
–20
–30
–50
–70
15
12
–3
–6
–9
–0.5
9
6
3
0
0
and REF
0
V
V
REF+ = 5V
REF– = GND
F
C
T
V
V
V
V
V
F
T
O
A
–0.4
INCM
CC
REF
LTC2435/LTC2435-1
O
R
REF
CC
REF +
REF –
IN +
IN –
A
= GND
= 25°C
R
R
SOURCE
= GND
= 25°C
= 5V
SOURCE
= 5V
= 10μF
SOURCE
= 1.25V
= 3.75V
–0.3
= 0.5 • (IN
400
= 5V
= GND
Values (C
–
–0.2
= 10k
SOURCE
, the expected drift of the dynamic
= 5k
= 1k
V
INDIF
C
–0.1
800
R
IN
+
SOURCE
+ IN
= 1μF, 10μF
/V
REF
0
REFDIF
at REF
–
) = 2.5V
1200
0.1
≥ 1μF)
(Ω)
(V)
SOURCE
C
0.2
+
IN
and REF
C
= 0.01μF
1600
0.3
IN
= 0.1μF
0.4
at REF
2435 F25
2435 F24
IN
2000
0.5
–
= IN
(Large C
+
and
+
– IN
29
24351fb
REF
–
)
)