LTC2216IUP#PBF Linear Technology, LTC2216IUP#PBF Datasheet - Page 25

IC ADC 16BIT 80MSPS 64-QFN

LTC2216IUP#PBF

Manufacturer Part Number
LTC2216IUP#PBF
Description
IC ADC 16BIT 80MSPS 64-QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2216IUP#PBF

Number Of Bits
16
Sampling Rate (per Second)
80M
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
1.52W
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-WFQFN, Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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The internal programmable gain amplifi er provides the
internal reference voltage for the ADC. This amplifi er has
very stringent settling requirements and therefore is not
accessible for external use.
The SENSE pin can be driven ±5% around the nominal 2.5V
or 1.25V external reference inputs. This adjustment range
can be used to trim the ADC gain error or other system
gain errors. When selecting the internal reference, the
SENSE pin should be tied to V
as possible. If the sense pin is driven externally it should
be bypassed to ground as close to the device as possible
with 1μF ceramic capacitor.
Driving the Encode Inputs
The noise performance of the LTC2216/LTC2215 can
depend on the encode signal quality as much as on the
analog input. The encode inputs are intended to be driven
differentially, primarily for noise immunity from common
mode noise sources. Each input is biased through a 6k
resistor to a 1.6V bias. The bias resistors set the DC oper-
ating point for transformer coupled drive circuits and can
set the logic threshold for single-ended drive circuits.
Any noise present on the encode signal will result in ad-
ditional aperture jitter that will be RMS summed with the
inherent ADC aperture jitter.
In applications where jitter is critical (high input frequen-
cies), take the following into consideration:
1. Differential drive should be used.
2. Use as large an amplitude possible. If using trans-
APPLICATIONS INFORMATION
former coupling, use a higher turns ratio to increase the
amplitude.
3.3V
1μF
Figure 7. A 2.75V Range ADC with
an External 2.5V Reference
2
LTC1461-2.5
1.575V
4
6
DD
SENSE
as close to the converter
2.2μF
2.2μF
V
CM
LTC2216/
LTC2215
22165 F07
3. If the ADC is clocked with a fi xed-frequency sinusoidal
4. Balance the capacitance and series resistance at both
The encode inputs have a common mode range of 1.2V
to V
single-ended drive.
signal, fi lter the encode signal to reduce wideband
noise.
encode inputs such that any coupled noise will appear
at both inputs as common mode noise.
DD
T1 = MA/COM ETC1-1-13
RESISTORS AND CAPACITORS
ARE 0402 PACKAGE SIZE
ENC
ENC –
. Each input may be driven from ground to V
+
0.1μF
0.1μF
Figure 8. Equivalent Encode Input Circuit
LTC2216/LTC2215
V
DD
Figure 9. Balun-Driven Encode
T1
V
50Ω
50Ω
DD
1.6V
LTC2216/LTC2215
6k
1.6V
0.1μF
6k
8.2pF
V
DD
100Ω
ENC
ENC –
+
TO INTERNAL
ADC CLOCK
DRIVERS
LTC2216/
LTC2215
22165 F08
22165 F09
25
DD
22165f
for

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