AD7788BRMZ Analog Devices Inc, AD7788BRMZ Datasheet - Page 16

IC ADC 16BIT LP 10-MSOP

AD7788BRMZ

Manufacturer Part Number
AD7788BRMZ
Description
IC ADC 16BIT LP 10-MSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7788BRMZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
16
Sampling Rate (per Second)
16.6
Number Of Converters
1
Power Dissipation (max)
230µW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
10-TFSOP (0.118", 3.00mm Width)
Resolution (bits)
16bit
Input Channel Type
Differential
Supply Current
80µA
Digital Ic Case Style
SOP
No. Of Pins
10
Operating Temperature Range
-40°C To +105°C
Number Of Elements
1
Resolution
16Bit
Architecture
Delta-Sigma
Sample Rate
0.0166KSPS
Input Polarity
Bipolar
Input Type
Voltage
Rated Input Volt
±2.5V
Differential Input
Yes
Power Supply Requirement
Single
Single Supply Voltage (typ)
3/5V
Single Supply Voltage (min)
2.5V
Single Supply Voltage (max)
5.25V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
225uW
Integral Nonlinearity Error
±15ppm of FSR
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
10
Package Type
MSOP
Input Signal Type
Differential
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7788BRMZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD7788/AD7789
Continuous Read Mode
Rather than write to the communications register each time a
conversion is complete to access the data, the AD7788/AD7789
can be placed in continuous read mode. By writing 001111XX
to the communications register, the user needs only to apply the
appropriate number of SCLK cycles to the ADC and the data-
word is automatically placed on the DOUT/ RDY line when a
conversion is complete.
When DOUT/ RDY goes low to indicate the end of a conver-
sion, sufficient SCLK cycles must be applied to the ADC and
the data conversion is placed on the DOUT/ RDY line. When
the conversion is read, DOUT/ RDY returns high until the next
conversion is available. In this mode, the data can be read only
once. Also, the user must ensure that the data-word is read
before the next conversion is complete.
DOUT/RDY
SCLK
DIN
CS
0x3C
Figure 13. Continuous-Read Mode
Rev. B | Page 16 of 20
DATA
If the data-word has not read the conversion before the
completion of the next conversion, or if insufficient serial clocks
are applied to the AD7788/AD7789 to read the word, the serial
output register is reset when the next conversion is complete
and the new conversion is placed in the output serial register.
To exit continuous read mode, the instruction 001110XX must
be written to the communications register while the DOUT/
RDY pin is low. While in continuous read mode, the ADC
monitors activity on the DIN line so that it can receive the
instruction to exit continuous read mode. Additionally, a
reset occurs if 32 consecutive 1s are seen on DIN. Therefore,
DIN should be held low in continuous read mode until an
instruction is to be written to the device.
DATA
DATA

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