AD9237BCPZ-40 Analog Devices Inc, AD9237BCPZ-40 Datasheet - Page 2

• Manufacturer Part Number: AD9237BCPZ-40
• Description: IC ADC 12BIT SGL 40MSPS 32LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9237BCPZ-40

• Data Interface: Parallel
• Number Of Bits: 12
• Sampling Rate (per Second): 40M
• Number Of Converters: 3
• Power Dissipation (max): 135mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN, CSP Exposed Pad
• Resolution (bits): 12bit
• Input Channel Type: Differential
• Supply Voltage Range - Analogue: 2.7V To 3.6V
• Supply Voltage Range - Digital: 2.25V To 3.6V
• Supply Current: 45.5mA
• Sampling Rate: 40MSPS
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9237
DC SPECIFICATIONS
unless otherwise noted)
Parameter
RESOLUTION
ACCURACY
TEMPERATURE DRIFT
INTERNAL VOLTAGE REFERENCE
INPUT REFERRED NOISE
ANALOG INPUT
REFERENCE INPUT RESISTANCE
POWER SUPPLIES
POWER CONSUMPTION
NOTES
1.
2.
3.
4.
5.
6.
Specifications subject to change without notice.
AD9237 Preliminary Technical Information – 5/18/2005
PSRR
No Missing Codes Guaranteed
Offset Error
Gain Error
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
Offset Error
Gain Error
Output Voltage Error (1 V Mode)
Load Regulation @ 1.0 mA
Output Voltage Error (0.5 V Mode)
Load Regulation @ 0.5 mA
VREF = 0.5 V
VREF = 1.0 V
Input Span, VREF = 0.5V; MODE 2 = 0V;
Input Span, VREF = 1.0V; MODE 2 = 0V;
Input Span, VREF = 0.5V; MODE2= AVDD;
Input Span, VREF = 1.0V;MODE2 = AVDD;
Input Capacitance
Supply Voltages
Supply Current
IAVDD
IDRVDD
DC Input
Sine Wave Input
Power Down Mode
Standby Power
AVDD
DRVDD
Gain error and gain temperature coefficient are based on the ADC only (with a fixed 1.0V external reference).
Measured at maximum Clock Rate, F
Input Capacitance refers to the effective capacitance between one differential input pin and AGND.
Measured with dc input at Maximum Clock Rate.
Power Down Mode power is measured with a dc input, the CLK pin inactive (i.e., set to AVDD or AGND)
Standby Mode power is measured with a dc input, the CLK pin active.
2
2
4
1
1
6
2
3
5
(AVDD = +3V, DRVDD = +3V, 2Vp-p Input, –0.5dBFS, 1.0V internal reference, T
IN
= 2.4MHz, full-scale sine wave, with approximately 5pF loading on each output bit.
Temp
Full
Full
Full
Full
Full
25°C
Full
25°C
Full
Full
Full
Full
Full
Full
25°C
25°C
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Test
Level
VI
VI
VI
VI
IV
I
IV
I
V
V
VI
V
V
V
V
V
IV
IV
IV
IV
V
V
IV
IV
VI
VI
VI
V
VI
V
V
2.7
AD9237BCPZ-20
Min
12
12
2.25
–2–
Typ
+0.5
+0.5
+0.5
+0.5
+1.2
+1.2
+2
+12
+5
0.8
+2.5
0.1
1.36
0.68
7
7
3.0
3.0
30
2
+0.01
90
95
1
17
Preliminary Technical Data
Max
1
2
2
4
3.6
3.6
AD9237BCPZ-40
Min
12
12
2.7
2.25
0.8
0.1
Typ
+0.5
+0.5
+0.5
+0.5
+1.2
+1.2
+2
+12
+5
+2.5
1.36
0.68
7
7
3.0
3.0
44
5
+0.01
134
152
1
17
Max
1
2
2
4
3.6
3.6
AD9237BCPZ-65
Min
12
2.7
2.25
12
Typ
+0.5
+0.5
+0.5
+0.5
+1.2
+1.2
+2
+12
+5
0.8
+2.5
0.1
1.36
0.68
7
7
3.0
3.0
63
7
+0.01
188
216
1
17
Max
1
2
2
4
3.6
3.6
MIN
to T
Units
Bits
Bits
%FSR
%FSR
LSB
LSB
LSB
LSB
ppm/°C
ppm/°C
mV
mV
mV
mV
LSB rms
LSB rms
Vp-p
Vp-p
Vp-p
pF
k
V
V
mA
mA
%FSR
mW
mW
mW
mW
MAX
PrF
,