AD7739BRU Analog Devices Inc, AD7739BRU Datasheet
AD7739BRU
Specifications of AD7739BRU
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AD7739BRU Summary of contents
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FEATURES High resolution ADC 24 bits no missing codes ±0.0015% nonlinearity Optimized for fast channel switching 18-bit p-p resolution (21 bits effective) at 500 Hz 16-bit p-p resolution (19 bits effective kHz On-chip per channel system calibration Configurable ...
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AD7739 TABLE OF CONTENTS AD7739—Specifications.................................................................. 3 Timing Specifications....................................................................... 6 Absolute Maximum Ratings............................................................ 8 Typical Performance Characteristics ............................................. 9 Output Noise and Resolution Specification................................ 10 Chopping Enabled...................................................................... 10 Chopping Disabled..................................................................... 11 Pin Configuration and Function Descriptions........................... 12 Register Descriptions ..................................................................... 14 ...
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AD7739—SPECIFICATIONS Table 1. (–40°C to +105° ± 5 AINCOM = 2.5 V; Internal Buffer On, AIN Range = ±1. Parameter ADC PERFORMANCE CHOPPING ENABLED Conversion Time Rate Missing Codes ...
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AD7739 Parameter REFERENCE INPUTS 1, 9 REFIN(+) to REFIN(–) Voltage NOREF Trigger Voltage REFIN(+), REFIN(–) Common-Mode/ 1 Absolute Voltage 10 Reference Input DC Current 1, 11 SYSTEM CALIBRATION Full-Scale Calibration Limit Zero-Scale Calibration Limit Input Span LOGIC INPUTS Input Current ...
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Parameter POWER REQUIREMENTS AV to AGND Voltage DGND Voltage DD AV Current (Normal Mode Current (Reduced Power Mode Current (Internal Buffer Off Current (Normal Mode Current (Normal ...
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AD7739 TIMING SPECIFICATIONS Table 2. ( ± ± 5%; Input Logic Logic unless otherwise noted.) Parameter ...
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SCLK DOUT MSB Figure 2. Read Cycle Timing Diagram SCLK DIN MSB Figure 3. Write Cycle Timing Diagram ...
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AD7739 ABSOLUTE MAXIMUM RATINGS Table 25°C, unless otherwise noted.) A Parameter AV to AGND DGND DD DD AGND to DGND AIN, AINCOM to AGND REFIN+, REFIN– to AGND P0, P1 ...
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TYPICAL PERFORMANCE CHARACTERISTICS CHOP = FILTER WORD Figure 5. No Missing Codes Performance, Chopping Enabled CHOP = 0 22 ...
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AD7739 OUTPUT NOISE AND RESOLUTION SPECIFICATION The AD7739 can be operated with chopping enabled or disabled, allowing the ADC to be programmed to optimize either the offset drift performance or the throughput rate and channel switching time. Noise tables for ...
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CHOPPING DISABLED The second mode, in which the AD7739 is configured with chopping disabled (CHOP = 0), provides faster conversion time while maintaining high resolution. Table 7 to Table 9 show the –3 dB frequencies and typical performance versus the ...
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AD7739 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SCLK 1 24 MCLKIN 2 23 MCLKOUT RESET 5 20 AD7739 TOP VIEW AINCOM/ (Not to Scale) SYNC/ AIN7 9 16 ...
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Pin No. Mnemonic 8 SYNC/P1 9–16 AIN0–AIN7 17 REFIN(+) 18 REFIN(–) 19 AGND 20 RDY 21 DOUT 22 DIN DGND Description SYNC/Digital Input/Digital Output. The pin direction is determined by the P1 DIR bit; the digital ...
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AD7739 REGISTER DESCRIPTIONS Table 11. Register Summary Register Addr (hex) Communications 0x00 I/O Port 0x01 Revision 0x02 Test 0x03 ADC Status 0x04 Checksum 0x05 ADC Zero-Scale Calibration 0x06 ADC Full-Scale Calibration 0x07 Channel Data 1 0x08–0x0F 1 Channel Zero-Scale Cal. ...
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REGISTER ACCESS The AD7739 is configurable through a series of registers. Some of them configure and control general AD7739 features, while others are specific to each channel. The register data widths vary from 8 bits to 24 bits. All registers ...
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AD7739 I/O PORT REGISTER 8 Bits, Read/Write Register, Address 0x01, Default Value 0x30 + Digital Input Value × 0x40 The bits in this register are used to configure and access the digital I/O port on the AD7739. Bit Bit 7 ...
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ADC STATUS REGISTER 8 Bits, Read-Only Register, Address 0x04, Default Value 0x00 In conversion modes, the register bits reflect the individual channel status. When a conversion is complete, the corresponding channel data register is updated and the corresponding RDY bit ...
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AD7739 CHANNEL ZERO-SCALE CALIBRATION REGISTERS 24 Bits, Read/Write Registers, Address 0x10–0x17, Default Value 0x80 0000 These registers hold the particular channel zero-scale calibration coefficients. The value in these registers is used in conjunction with the value in the corresponding channel ...
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CHANNEL SETUP REGISTERS 8 Bits, Read/Write Registers, Address 0x28–0x2F, Default Value 0x00 These registers are used to configure the selected channel, to configure its input voltage range, and to set up the corresponding channel status register. Bit Bit 7 Mnemonic ...
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AD7739 CHANNEL CONVERSION TIME REGISTERS 8 Bits, Read/Write Registers, Address 0x30–0x37h, Default Value 0x91 The conversion time registers enable or disable chopping and configure the digital filter for a particular channel. This register value affects the conversion time, frequency response, ...
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Bit Mnemonic Description 4 CLKDIS Master Clock Output Disable. When this bit is set to 1, the master clock is disabled from appearing at the MCLKOUT pin and the MCLKOUT pin high impedance state. This allows turning ...
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AD7739 DIGITAL INTERFACE DESCRIPTION HARDWARE The AD7739 serial interface can be connected to the host device via the serial interface in several different ways. The CS pin can be used to select the AD7739 as one of several circuits connected ...
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RESET The AD7739 can be reset by the RESET pin or by writing a reset sequence to the AD7739 serial interface. The reset sequence is N × × 1, which could be the data sequence 0x00 + ...
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AD7739 CONTINUOUS CONVERSION MODE When the mode register is being written, the ADC status byte is cleared and the RDY pin goes high, regardless of its previous state. When the continuous conversion command is written to the mode register, the ...
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CONTINUOUS READ (CONTINUOUS CONVERSION) MODE When the Cont RD bit in the mode register is set, the first write of 0x48 to the communications register starts the continuous read mode. As shown in Figure 22, subsequent accesses to the part ...
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AD7739 CIRCUIT DESCRIPTION The AD7739 is a high precision analog-to-digital converter that is intended for the measurement of wide dynamic range, low frequency signals in industrial process control, instrumentation, and PLC systems. It contains a multiplexer, an input buffer, a ...
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MULTIPLEXER, CONVERSION, AND DATA OUTPUT TIMING The specified conversion time includes one or two settling and sampling periods and a scaling time. With chopping enabled (Figure 24), a conversion cycle starts with a settling time of 43 MCLK cycles or ...
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AD7739 FREQUENCY RESPONSE The sigma-delta modulator runs at ½ the MCLK frequency, which is effectively the sampling frequency. Therefore, the modulator Nyquist frequency is ¼ of the MCLK. If chopping is enabled, the input signal is resampled by chopping. Therefore, ...
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ANALOG INPUT’S EXTENDED VOLTAGE RANGE The AD7739 output data code span corresponds to the nominal input voltage range. The ADC is functional outside the nominal input voltage range, but the performance might degrade. The sigma-delta modulator was designed to fully ...
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AD7739 CALIBRATION The AD7739 provides zero-scale self-calibration, and zero- and full-scale system calibration capability that can effectively reduce the offset error and gain error to the order of the noise. After each conversion, the ADC conversion result is scaled using ...
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10µF 100Ω 0.1µF ANALOG INPUTS 100Ω 0.1µF 100Ω AINCOM 0.1µ REFIN(+) ADR421 REFIN(-) + 10µF 0.1µF 0.1µF Figure 28. Typical Connections for the AD7739 Application 0.1µ AIN0 CLOCK GENERATOR 24-BIT MUX Σ-∆ ADC ...
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... ORDERING GUIDE Model Temperature Range AD7739BRU –40°C to +105°C AD7739BRU-REEL –40°C to +105°C AD7739BRU-REEL7 –40°C to +105°C © 2003 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective companies. 7.90 7.80 7.70 ...