AD7738BRU Analog Devices Inc, AD7738BRU Datasheet

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AD7738BRU

Manufacturer Part Number
AD7738BRU
Description
IC ADC 24BIT 8-CH 28-TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7738BRU

Rohs Status
RoHS non-compliant
Number Of Bits
24
Sampling Rate (per Second)
15.4k
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
100mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP (0.173", 4.40mm Width)
For Use With
EVAL-AD7738EBZ - BOARD EVAL FOR AD7738

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a
GENERAL DESCRIPTION
The AD7738 is a high precision, high throughput analog front
end. True 16-bit p-p resolution is achievable with a total con-
version time of 117 µs (8.5 kHz channel switching), making it
ideally suitable for high resolution multiplexing applications.
The part can be configured via a simple digital interface, which
allows users to balance the noise performance against data
throughput up to a 15.4 kHz.
The analog front end features eight single-ended or four fully
differential input channels with unipolar or bipolar 625 mV,
1.25 V, and 2.5 V input ranges and accepts a common-mode
input voltage from 200 mV above AGND to AV
The multiplexer output is pinned out externally, allowing the
user to implement programmable gain or signal conditioning
before applying the input to the ADC.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corporation
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
FEATURES
High Resolution ADC
Optimized for Fast Channel Switching
Configurable Inputs
Input Ranges
3-Wire Serial Interface
Single-Supply Operation
Package: 28-Lead TSSOP
APPLICATIONS
PLCs/DCS
Multiplexing Applications
Process Control
Industrial Instrumentation
24 Bits No Missing Codes
18-Bits p-p Resolution (21 Bits Effective) at 500 Hz
16-Bits p-p Resolution (19 Bits Effective) at 8.5 kHz
15-Bits p-p Resolution (18 Bits Effective) at 15 kHz
On-Chip Per Channel System Calibration
8 Single-Ended or 4 Fully Differential
+625 mV, +1.25 V, +2.5 V,
SPI™, QSPI™, MICROWIRE™ and DSP Compatible
Schmitt Trigger on Logic Inputs
5 V Analog Supply
3 V or 5 V Digital Supply
0.0015% Nonlinearity
625 mV,
DD
1.25 V,
– 300 mV.
2.5 V
The differential reference input features “No-Reference” detect
capability. The ADC also supports per channel system calibra-
tion options.
The digital serial interface can be configured for 3-wire opera-
tion and is compatible with microcontrollers and digital signal
processors. All interface inputs are Schmitt triggered.
The part is specified for operation over the extended industrial
temperature range of –40 C to +105 C.
Other parts in the AD7738 family are the AD7734 and the
AD7732.
The AD7734 analog front end features four single-ended input
channels with unipolar or true bipolar input ranges to ± 10 V
while operating from a single 5 V analog supply. The AD7734
accepts an analog input overvoltage to ± 16.5 V while not
degrading the performance of the adjacent channels.
The AD7732 is similar to AD7734, but its analog front end
features two fully differential input channels.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
AINCOM/P0
SYNC/P1
8-Channel, High Throughput,
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AGND
FUNCTIONAL BLOCK DIAGRAM
MUX
I/O PORT
AV
MUXOUT ADCIN
DD
MCLKOUT
CALIBRATION
GENERATOR
CIRCUITRY
AD7738
CLOCK
24-Bit - ADC
BUFFER
MCLKIN
© Analog Devices, Inc., 2002
REFIN– REFIN+
INTERFACE
CONTROL
REFERENCE
SERIAL
AD7738
LOGIC
DGND
24-BIT
DETECT
- ADC
www.analog.com
DV
DD
SCLK
DOUT
DIN
CS
RDY
RESET

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AD7738BRU Summary of contents

Page 1

FEATURES High Resolution ADC 24 Bits No Missing Codes 0.0015% Nonlinearity Optimized for Fast Channel Switching 18-Bits p-p Resolution (21 Bits Effective) at 500 Hz 16-Bits p-p Resolution (19 Bits Effective) at 8.5 kHz 15-Bits p-p Resolution (18 Bits ...

Page 2

AD7738–SPECIFICATIONS REFIN(+) = 2.5 V, REFIN(– AINCOM = 2.5 V, MUXOUT(+) = ADCIN(+), MUXOUT(–) = ADCIN(–), Internal Buffer ON, AIN Range = f = 6.144 MHz; unless otherwise noted.) MCLK Parameter ADC PERFORMANCE— CHOPPING ENABLED Conversion Time ...

Page 3

Parameter LOGIC INPUTS SCLK, DIN, CS, and RESET Inputs Input Current Input Current CS Input Capacitance T– – T– T– – T– ...

Page 4

AD7738 TIMING SPECIFICATIONS ( Parameter Min MASTER CLOCK RANGE 500 2 READ OPERATION ...

Page 5

CS SCLK DOUT CS SCLK DIN Figure 3. Load Circuit for Access Time and Bus Relinquish Time REV MSB Figure 1. Read Cycle Timing Diagram ...

Page 6

... P1 Voltage to AGND . . . . . . . . . . . . . . –0 Digital Input Voltage to DGND . . . . . –0 Digital Output Voltage to DGND . . . . –0 Model AD7738BRU CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7738 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges ...

Page 7

Pin No. Mnemonic Description 1 SCLK Serial Clock. Schmitt-Triggered Logic Input. An external serial clock is applied to this input to transfer serial data to or from the AD7738. 2 MCLKIN Master Clock Signal for the ADC. This can be ...

Page 8

AD7738 Pin No. Mnemonic Pin Description 15 ADCIN(–) ADC Negative Input. In normal circuit configuration, this pin should be connected to the MUXOUT– pin. 16 ADCIN(+) ADC Positive Input. In normal circuit configuration, this pin should be connected to the ...

Page 9

OUTPUT NOISE AND RESOLUTION SPECIFICATION The AD7738 can be operated with chopping enabled or disabled, allowing the ADC to be programmed either to optimize the throughput rate and channel switching time or to optimize offset drift performance. Noise tables for ...

Page 10

AD7738 CHOPPING DISABLED The second mode, in which the AD7738 is configured with chopping disabled (CHOP = 0), provides faster conversion time while still maintaining high resolution. Tables show the –3 dB frequencies and typical performance versus ...

Page 11

CHOP = FILTER WORD TPC 1. No Missing Codes Performance, Chopping Enabled 25 24 CHOP = ...

Page 12

AD7738 Addr Dir Register hex Communications 00 W I/O Port 01 R/W Revision 02 R Test 03 R/W ADC Status 04 R Checksum 05 R/W ADC ZS Calibration 06 R/W ADC FS 07 R/W 1 Channel Data 08- ...

Page 13

REGISTER DESCRIPTION The AD7738 is configurable through a series of registers. Some of them configure and control general AD7738 features, others are specific to each channel. The register data widths vary from 8 bits to 24 bits. All registers are ...

Page 14

AD7738 I/O Port Register 8 Bits, Read/Write Register, Address 01h, Default Value 30h + Digital Input Value The bits in this register are used to configure and access the digital I/O pin on the AD7738. Bit Bit 7 Mnemonic P0 ...

Page 15

Checksum Register 16 Bits, Read/Write Register, Address 05h This register is described in the “AD7732/34/38 Checksum Register” Technical Note. ADC Zero Scale Calibration Register 24 Bits, Read/Write Register, Address 06h, Default Value 800000h The register holds the ADC Zero-Scale Calibration ...

Page 16

AD7738 Channel Status Registers 8 Bits, Read-Only Register, Address 20h–27h, Default Value 20h These registers contain individual channel status information and some general AD7738 status information. Reading the Status registers can be associated with reading the Data registers in the ...

Page 17

Channel Setup Registers 8 Bits, Read/Write Register, Address 28h–2Fh, Default Value 00h These registers are used to configure the selected channel, its input voltage range, and set up the corresponding Channel Status register. Bit Bit 7 Mnemonic BUF OFF Default ...

Page 18

AD7738 Mode Register 8 Bits Read/Write Register, Address 38h–3Fh, Default Value 00h The Mode register configures the part and determines the part’s operating mode. Writing to the Mode register will clear the ADC Status register, set the RDY pin to ...

Page 19

MD2 MD1 MD0 Operating Mode Idle Mode The default mode after Power-On or Reset. The AD7738 returns to this mode automatically after any calibration or after a single conversion Continuous Conversion Mode The AD7738 ...

Page 20

AD7738 DIGITAL INTERFACE DESCRIPTION Hardware The AD7738 serial interface can be connected to the host device via the serial interface in several different ways. The CS pin can be used to select the AD7738 as one of several circuits connected ...

Page 21

Single Conversion and Reading Data When the Mode register is being written, the ADC Status Byte is cleared and the RDY pin goes high regardless of its previous state. When the single conversion command is written to the Mode register, ...

Page 22

AD7738 Continuous Conversion Mode When the Mode register is being written, the ADC Status Byte is cleared and the RDY pin goes high regardless of its previous state. When the continuous conversion command is written to the Mode register, the ...

Page 23

CS SCLK DIN 38h 48h DOUT RDY WRITE WRITE CONVERSION COMM. MODE ON CH0 REGISTER REGISTER COMPLETE Figure 12. Continuous Conversion CH0 and CH1, Continuous Read Continuous Read (Continuous Conversion) Mode When the Continuous RD bit in the Mode register ...

Page 24

AD7738 MULTIPLEXER BUFFER MUXOUT ADCIN AIN(+) AIN(– ) CHOP f MCLK Figure 13. Channel Signal Chain Diagram with Chopping Enabled Multiplexer, Conversion, and Data Output Timing The specified “Conversion Time” includes one or two “Settling” and “Sampling” periods and a ...

Page 25

CHOP = 1 –20 –30 –40 –50 –60 0.1 1 NORMALIZED INPUT FREQUENCY (INPUT FREQUENCY CONVERSION TIME) a. Chopping Enabled Analog Inputs Voltage Range The absolute input voltage range with input the buffer enabled is restricted from AGND ...

Page 26

AD7738 Voltage Reference Inputs The AD7738’s reference inputs, REFIN(+) and REFIN(–), provide a differential reference input capability. The common- mode range for these differential inputs is from AGND to AV The nominal reference voltage for specified operation is 2.5 V. ...

Page 27

CALIBRATION The AD7738 provides zero-scale self-calibration, and zero and full system calibration capability, which can effectively reduce the offset error and gain error to the order of the noise. After each conversion, the ADC conversion result is scaled using the ...

Page 28

AD7738 28-Lead Thin Shrink Small Outline Package (TSSOP) PIN 1 0.15 0.05 COPLANARITY 0.10 OUTLINE DIMENSIONS (RU-28) Dimensions shown in millimeters 9.80 9.70 9. 4.50 4.40 4.30 6.40 BSC 1 14 0.65 1.20 BSC MAX 0.30 0.20 0.19 ...

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