MAX1301BEUP+ Maxim Integrated Products, MAX1301BEUP+ Datasheet - Page 5

IC ADC 16BIT SER 4CH LP 20TSSOP

MAX1301BEUP+

Manufacturer Part Number
MAX1301BEUP+
Description
IC ADC 16BIT SER 4CH LP 20TSSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1301BEUP+

Number Of Bits
16
Sampling Rate (per Second)
115k
Data Interface
MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
105.5mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ELECTRICAL CHARACTERISTICS (continued)
(AV
external clock mode, V
(±3 x V
Preamplifier Supply Voltage
Digital I/O Supply Voltage
AV
DV
AV
DV
Total Supply Current
Power-Supply Rejection Ratio
TIMING CHARACTERISTICS (Figures 15 and 16)
SCLK Period
SCLK High Pulse Width (Note 6)
SCLK Low Pulse Width (Note 6)
DIN to SCLK Setup
DIN to SCLK Hold
SCLK Fall to DOUT Valid
8- and 4-Channel, ±3 x V
DD1
DD1
DD
DD2
DDO
Fall to DOUT Enable
REF
Supply Current
Supply Current
Supply Current
= AV
Supply Current
PARAMETER
), C
DD2
DOUT
= DV
= 50pF, C
_______________________________________________________________________________________
DD
REF
= DV
= 4.096V (external reference operation), REFCAP = AV
SSTRB
DDO
= 50pF, T
= 5V, AGND1 = DGND = DGNDO = AGND2 = AGND3 = 0, f
SYMBOL
I
DV
I
I
AV
DVDDO
I
AVDD1
AVDD2
PSRR
DVDD
t
t
t
t
t
t
t
CH
DH
DO
CP
CL
DS
DV
DDO
DD2
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
External clock
mode, external
acquisition mode, or
internal clock mode
External clock mode, external
acquisition mode, or internal clock mode
External clock mode, external
acquisition mode, or internal clock mode
External clock mode, external
acquisition mode, or internal clock mode
Partial power-down mode
Full power-down mode
All analog input ranges
External clock mode
External acquisition mode
Internal clock mode
External clock mode
External acquisition mode
Internal clock mode
External clock mode
External acquisition mode
Internal clock mode
CONDITIONS
REF
Internal reference
External reference
Serial 16-Bit ADCs
Multirange Inputs,
DD1
, maximum single-ended bipolar input range
0.272
0.228
4.75
2.70
MIN
109
109
0.1
92
40
92
40
40
0
CLK
= 3.5MHz (50% duty cycle),
±0.5
TYP
13.5
0.01
2.3
0.8
1.3
0.5
3
A
= +25°C.)
MAX
5.25
5.25
3.5
20
62
62
40
40
3
2
1
UNITS
LSB
mA
mA
mA
mA
mA
μA
μs
ns
ns
ns
ns
ns
ns
V
V
5

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