AD9277BSVZ Analog Devices Inc, AD9277BSVZ Datasheet - Page 25

• Manufacturer Part Number: AD9277BSVZ
• Description: IC ADC 14BIT LNA/VGA/AAF 100TQFP
• Manufacturer: Analog Devices Inc
• Type: Ultrasound Receiversr

Specifications of AD9277BSVZ

• Resolution (bits): 14 b
• Data Interface: Serial, SPI™
• Sampling Rate (per Second): 10M ~ 50M
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 1.8V, 3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Sampling Rate: 50MSPS
• Input Channel Type: Single Ended
• Supply Voltage Range - Digital: 1.7V To 1.9V
• Supply Current: 365mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

INPUT OVERDRIVE
Excellent overload behavior is of primary importance in
ultrasound. Both the LNA and VGA have built-in overdrive
protection and quickly recover after an overload event.
Input Overload Protection
As with any amplifier, voltage clamping prior to the inputs
is highly recommended if the application is subject to high
transient voltages.
Figure 52 shows a simplified ultrasound transducer interface.
A common transducer element serves the dual functions of
transmitting and receiving ultrasound energy. During the
transmitting phase, high voltage pulses are applied to the ceramic
elements. A typical transmit/receive (T/R) switch can consist of
four high voltage diodes in a bridge configuration. Although the
diodes ideally block transmit pulses from the sensitive receiver
input, diode characteristics are not ideal, and the resulting leakage
transients imposed on the LI-x inputs can be problematic.
Because ultrasound is a pulse system and time-of-flight is used
to determine depth, quick recovery from input overloads is
essential. Overload can occur in the preamplifier and in the
VGA. Immediately following a transmit pulse, the typical VGA
gains are low, and the LNA is subject to overload from T/R
switch leakage. With increasing gain, the VGA can become
overloaded due to strong echoes that occur near field echoes
and acoustically dense materials, such as bone.
Figure 52 illustrates an external overload protection scheme. A
pair of back-to-back signal diodes should be in place prior to the
ac coupling capacitors. Keep in mind that all diodes are prone to
exhibiting some amount of shot noise. Many types of diodes are
available for achieving the desired noise performance. The
configuration shown in Figure 52 tends to add 2 nV/√Hz of
input-referred noise. Decreasing the 5 kΩ resistor and increasing
the 2 kΩ resistor may improve noise contribution, depending on
the application. With the diodes shown in Figure 52, clamping
levels of ±0.5 V or less significantly enhance the overload
performance of the system.
DRIVER
Tx
TRANSDUCER
Figure 52. Input Overload Protection
5kΩ
5kΩ
+5V
–5V
HV
2kΩ
10nF
10nF
AD9277
LNA
Rev. 0 | Page 25 of 48
CW DOPPLER OPERATION
Each channel of the AD9277 includes an I/Q demodulator. Each
demodulator has an individual programmable phase shifter.
The I/Q demodulator is ideal for phased array beamforming
applications in medical ultrasound. Each channel can be pro-
grammed for 16 delay states (360°/16 or 22.5°/step), selectable
via the SPI port. The part has a RESET input used to synchronize
the LO dividers of each channel. If multiple AD9277s are used,
a common RESET across the array ensures synchronized phase
for all channels. Internal to the AD9277, the individual channel I
and Q outputs are current summed. If multiple AD9277s are used,
the I and Q outputs from each AD9277 can be current summed
and converted to a voltage using an external transimpedance
amplifier.
Quadrature Generation
The internal 0° and 90° LO phases are digitally generated by
a divide-by-4 logic circuit. The divider is dc-coupled and
inherently broadband; the maximum LO frequency is limited
only by its switching speed. The duty cycle of the quadrature LO
signals is intrinsically 50% and is unaffected by the asymmetry
of the externally connected 4LO input. Furthermore, the divider
is implemented such that the 4LO signal reclocks the final flip-
flops that generate the internal LO signals and thereby minimizes
noise introduced by the divide circuitry.
For optimum performance, the 4LO input is driven differentially,
as done on the AD9277 evaluation board. The common-mode
voltage on each pin is approximately 1.2 V with the nominal 3 V
supply. It is important to ensure that the LO source has very low
phase noise (jitter), fast slew rate, and adequate input level to
obtain optimum performance of the CW signal chain.
Beamforming applications require a precise channel-to-channel
phase relationship for coherence among multiple channels. A
RESET pin is provided to synchronize the LO divider circuits
in different AD9277s when they are used in arrays. The RESET
pin resets the dividers to a known state after power is applied to
multiple AD9277s. Accurate channel-to-channel phase matching
can only be achieved via a common pulse on the RESET pin when
using more than one AD9277.
AD9277