X9252WV24IZ-2.7 Intersil, X9252WV24IZ-2.7 Datasheet

IC POT DGTL QUAD 24-TSSOP

X9252WV24IZ-2.7

Manufacturer Part Number
X9252WV24IZ-2.7
Description
IC POT DGTL QUAD 24-TSSOP
Manufacturer
Intersil
Series
XDCP™r
Datasheet

Specifications of X9252WV24IZ-2.7

Taps
256
Resistance (ohms)
10K
Number Of Circuits
4
Temperature Coefficient
300 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Resistance In Ohms
10K
Track Taper
Linear
Resistance Tolerance
± 20%
No. Of Steps
256
Supply Voltage Range
2.7V To 5.5V
Control Interface
2 Wire, Serial
No. Of Pots
Quad
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
X9252WV24IZ-2.7
Manufacturer:
INTERSIL
Quantity:
20 000
Quad Digitally-Controlled (XDCP™)
Potentiometer
The X9252 integrates 4 digitally controlled potentiometers
(XDCP) on a monolithic CMOS integrated circuit.
The digitally controlled potentiometers are implemented
using 255 resistive elements in a series array. Between each
pair of elements are tap points connected to wiper terminals
through switches. The position of each wiper on the array is
controlled by the user through the Up/Down (U/D) or 2-wire
bus interface. The wiper of each potentiometer has an
associated volatile Wiper Counter Register (WCR) and four
non-volatile Data Registers (DRs) that can be directly written
to and read by the user. The contents of the WCR controls
the position of the wiper on the resistor array through the
switches. At power-up, the device recalls the contents of the
default data registers DR00, DR10, DR20, DR30, to the
corresponding WCR.
Each DCP can be used as a three-terminal potentiometer or
as a two terminal variable resistor in a wide variety of
applications including the programming of bias voltages, the
implementation of ladder networks, and three resistor
programmable networks.
®
1
Data Sheet
Low Power + Quad 256-tap + 2-Wire Bus + Up/Down Interface
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
Features
• Quad Solid State Potentiometer
• 256 Wiper Tap Points-0.4% Resolution
• 2-Wire Serial Interface for Write, Read, and Transfer
• Up/Down Interface for Individual Potentiometers
• Wiper Resistance: 40Ω Typical
• Non-Volatile Storage of Wiper Positions
• Power On Recall. Loads Saved Wiper Position on Power-
• Standby Current < 100µA Max
• Maximum Wiper Current: 3mA
• V
• 2.8kΩ,10kΩ, 50kΩ, 100kΩ Version of Total Pot Resistance
• Endurance: 100,000 Data Changes per Bit per Register
• 100 yr. Data Retention
• 24 Ld SOIC, 24 Ld TSSOP
• Pb-Free Plus Anneal Available (RoHS Compliant)
Pinout
November 14, 2005
Operations of the Potentiometer
Up.
CC
: 2.7V to 5.5V Operation
All other trademarks mentioned are the property of their respective owners.
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
R
R
V
DS0
R
R
R
U/D
R
WP
A0
W3
CC
W0
A2
H3
H0
L3
L0
(24 LD SOIC/TSSOP)
11
12
1
2
3
4
5
6
7
8
9
10
TOP VIEW
X9252
X9252
22
21
13
23
20
19
18
17
16
15
14
24
DS1
SCL
R
R
R
CS
V
R
R
R
A1
SDA
L2
H2
W2
SS
W1
H1
L1
X9252
FN8167.2

Related parts for X9252WV24IZ-2.7

X9252WV24IZ-2.7 Summary of contents

Page 1

... Pb-Free Plus Anneal Available (RoHS Compliant) Pinout CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X9252 FN8167.2 ...

Page 2

... PART NUMBER PART MARKING X9252YS24I-2.7 X9252YS24IZ-2.7 (Note) X9252YV24I-2.7 X9252YV G X9252YV24IZ-2.7 (Note) X9252YV Z G X9252WS24I-2.7 X9252WS G X9252WS24IZ-2.7 (Note) X9252WS Z G X9252WV24I-2.7 X9252WV G X9252WV24IZ-2.7 (Note) X9252WV Z G X9252US24I-2.7 X9252US G X9252US24IZ-2.7 (Note) X9252US Z G X9252UV24I-2.7 X9252UV G X9252UV24IZ-2.7 (Note) X9252UV Z G X9252TS24I-2.7 X9252TS G X9252TS24IZ-2.7 (Note) X9252TS Z G X9252TV24I-2 ...

Page 3

Pin Descriptions (Continued) SOIC/TSSOP PIN SYMBOL 5 RL3 6 U/D 7 VCC 8 RL0 9 RH0 10 RW0 SDA RL1 16 RH1 17 RW1 18 VSS RW2 21 RH2 ...

Page 4

Absolute Maximum Ratings Junction Temperature under bias .-65°C to +135°C Storage temperature . . . . . . . . . . . . . . . ...

Page 5

DC Electrical Specifications Over the recommended operating conditions unless otherwise specified. (Continued) SYMBOL PARAMETER I Leakage current, bus interface pins L V Input HIGH voltage IH V Input LOW voltage IL V SDA pin output LOW voltage OL Endurance and ...

Page 6

Interface timing (s) (Continued) SYMBOL t (Note 5) Bus Free Time (Prior to Any Transmission) BUF t A0, A1, A2 and WP Setup Time SU:WPA (Note 5) t A0, A1, A2 and WP Hold Time HD:WPA (Note 5) SDA ...

Page 7

Increment/Decrement Timing CS t CYC SCL t ID U/D DS0, DS1 High-Voltage Write Cycle Timing SYMBOL t Non-volatile write cycle time WC (Notes 5, 8) XDCP Timing SYMBOL t (Note 5) SCL ...

Page 8

Test Circuit Test Point R W Force Current Principles of Operation The X9252 is an integrated circuit incorporating four resistor arrays, their associated registers and counters, and the serial interface logic providing direct communication between the host and the digitally ...

Page 9

Up/Down Interface Operation The SCL, U/D, CS, DS0 and DS1 inputs control the movement of the wiper along the resistor array. With CS set LOW the device is selected and enabled to respond to the U/D and SCL inputs. HIGH ...

Page 10

SCL SDA START FIGURE 2. VALID DATA CHANGES, START, AND STOP CONDITIONS SCL from Master SDA Output from Transmitter SDA Output from Receiver START FIGURE 3. ACKNOWLEDGE RESPONSE FROM RECEIVER Serial Acknowledge An ACK (Acknowledge software convention used ...

Page 11

Nonvolatile Write Acknowledge Polling After a nonvolatile write command sequence is correctly issued (including the final STOP condition), the X9252 initiates an internal high voltage write cycle. This cycle typically requires 5ms. During this time, any Read or Write command ...

Page 12

STATUS REG (Note 1) (Addr: 07H) RESERVED DRSel1 BITS 7-3 bit 2 Reserved read or write the contents of a single Data Register or Wiper Register: 1. Load the status register (using a write ...

Page 13

DCP Addressing for 2-Wire Interface Once the register number has been selected by a 2-wire instruction, then the DCP number is determined by the Address Byte of the following instruction. Note again that this enables a complete page write of ...

Page 14

Page Write Operation As stated previously, the memory is organized as a single Status Register (SR), and four pages of four registers each. Each page contains one Data Register for each DCP. The order of the bytes within a page ...

Page 15

Move/Read Operation The Move/Read operation simultaneously reads the contents of a Data Register (DR) and moves the contents into the corresponding DCP’s WCR and the WCRs of all DCPs are updated with the content of their corresponding DR. Move/Read operation ...

Page 16

Applications Information Basic Configurations of Electronic Potentiometers V R Three terminal Potentiometer; Variable voltage divider Application Circuits NONINVERTING AMPLIFIER (1 OFFSET VOLTAGE ADJUSTMENT ...

Page 17

Application Circuits (Continued) ATTENUATOR -1/2 ≤ G ≤ +1/2 INVERTING AMPLIFIER ...

Page 18

Application Circuits (Continued) WINDOW COMPARATOR X9252 FUNCTION GENERATOR SHUNT LIMITER pR - ...

Page 19

Packaging Information .0075 (.19) .0118 (.30) 0°-8° See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 19 X9252 24-Lead Plastic, TSSOP, Package Code V24 .026 (.65) BSC .169 (4.3) .252 (6.4) BSC .177 (4.5) .303 (7.70) .311 ...

Page 20

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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