AD5233BRUZ50-R7 Analog Devices Inc, AD5233BRUZ50-R7 Datasheet - Page 21
![IC DGTL POT QUAD 64POS 24-TSSOP](/photos/6/60/66036/ru-24_sml.jpg)
AD5233BRUZ50-R7
Manufacturer Part Number
AD5233BRUZ50-R7
Description
IC DGTL POT QUAD 64POS 24-TSSOP
Manufacturer
Analog Devices Inc
Datasheet
1.AD5233BRUZ10-R7.pdf
(32 pages)
Specifications of AD5233BRUZ50-R7
Taps
64
Resistance (ohms)
50K
Number Of Circuits
4
Temperature Coefficient
600 ppm/°C Typical
Memory Type
Non-Volatile
Interface
4-Wire SPI Serial
Voltage - Supply
2.7 V ~ 5.5 V, ±2.25 V ~ 2.75 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Resistance In Ohms
50K
Number Of Elements
4
# Of Taps
64
Resistance (max)
50KOhm
Power Supply Requirement
Single/Dual
Interface Type
Serial (4-Wire/SPI)
Single Supply Voltage (typ)
3/5V
Dual Supply Voltage (typ)
±2.5V
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
±2.25V
Dual Supply Voltage (max)
±2.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
24
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The general equation that determines the programmed output
resistance between W and B is
where:
D is the decimal equivalent of the data contained in the RDAC
register.
R
R
For example, the output resistance values in Table 10 are set for
the given RDAC latch codes with V
10 kΩ digital potentiometers).
Table 10. R
D (Decimal)
63
32
1
0
Note that in the zero-scale condition a finite wiper resistance of
15 Ω is present. Care should be taken to limit the current flow
between W and B in this state to no more than 20 mA to avoid
degradation or possible destruction of the internal switches.
Like the mechanical potentiometer that the RDAC replaces, the
AD5233 part is totally symmetrical. The resistance between
Wiper W and Terminal A also produces a digitally controlled
complementary resistance, R
programmability of the various terminal connections. When
R
Setting the resistance value for R
of resistance and decreases as the data loaded in the latch is
increased in value.
The general transfer equation for this operation is
For example, the output resistance values in Table 11 are set for
the RDAC latch codes with V
digital potentiometers).
Table 11. R
D (Decimal)
63
32
1
0
Channel-to-channel R
change in R
coefficient.
AB
W
WA
is the wiper resistance.
is the nominal resistance between Terminal A and Terminal B.
is used, Terminal B can be left floating or tied to the wiper.
R
R
WA
WB
(
(
D
D
WB
WA
AB
)
)
=
=
(D) at Selected Codes for R
with temperature has a 600 ppm/°C temperature
(D) at Selected Codes for R
64
R
9858
5015
171
15
64
D
WB
64
−
×
(D) (Ω)
R
D
AB
AB
R
171
5015
9858
10015
×
WA
+
R
matching is better than 1%. The
(D) (Ω)
AB
R
WA
W
+
DD
Output State
Full scale
Midscale
1 LSB
Zero scale (wiper contact resistor)
. Figure 44 shows the symmetrical
R
= 5 V (applies to R
WA
W
DD
starts at a maximum value
= 5 V (applies to R
AB
AB
= 10 kΩ
Output State
Full scale
Midscale
1 LSB
Zero scale
= 10 kΩ
AB
= 10 kΩ
AB
=
Rev. B | Page 21 of 32
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PROGRAMMING THE POTENTIOMETER DIVIDER
Voltage Output Operation
The digital potentiometer can be configured to generate an
output voltage at the wiper terminal that is proportional to
the input voltages applied to Terminal A and Terminal B. For
example, connecting Terminal A to 5 V and Terminal B to
ground produces an output voltage at the wiper that can be
any value from 0 V to 5 V. Each LSB of voltage is equal to the
voltage applied across Terminal A and Terminal B divided
by the 2
Because AD5233 can also be supplied by dual supplies, the
general equation defining the output voltage at V
to ground for any given input voltages applied to the A and B
terminals is
Equation 3 assumes that V
wiper resistance is minimized. Operation of the digital potenti-
ometer in divider mode results in more accurate operation over
temperature. Here, the output voltage is dependent on the ratio
of the internal resistors and not the absolute value; therefore,
the drift improves to 15 ppm/°C. There is no voltage polarity
restriction among the A, B, and W terminals as long as the
terminal voltage (V
PROGRAMMING EXAMPLES
The following programming examples illustrate a typical
sequence of events for various features of the AD5233. See
Table 7 for the instructions and data-word format. The
instruction numbers, addresses, and data appearing at the
SDI and SDO pins are in hexadecimal format.
Table 12. Scratchpad Programming
SDI
0xB010
Table 13. Incrementing RDAC1 Followed by Storing the
Wiper Setting to EEMEM1
SDI
0xB010
0xE0XX
0xE0XX
0x20XX
V
W
N
(
position resolution of the potentiometer divider.
D
)
0xXXXX
SDO
=
SDO
0xXXXX
0xB010
0xE0XX
0xXXXX
64
D
×
V
TERM
AB
) stays within V
+
V
Action
Writes Data 0x10 into RDAC register,
Wiper W1 moves to ¼ full-scale position.
Action
Writes Data 0x10 into RDAC register,
Wiper W1 moves to ¼ full-scale
position.
Increments the RDAC register by one
to 0x11.
Increments the RDAC register by one
to 0x12. Continues until desired wiper
position is reached.
Stores the RDAC register data into
EEMEM1. Optionally tie WP to GND to
protect EEMEM values.
W
B
is buffered so that the effect of
SS
< V
TERM
W
< V
with respect
AD5233
DD
.
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