AD5235BRU25 Analog Devices Inc, AD5235BRU25 Datasheet - Page 19

• Manufacturer Part Number: AD5235BRU25
• Description: IC POT DUAL 25K 1024POS 16-TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD5235BRU25

• Rohs Status: RoHS non-compliant
• Taps: 1024
• Resistance (ohms): 25K
• Number Of Circuits: 2
• Temperature Coefficient: 35 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: 4-Wire SPI Serial
• Voltage - Supply: 3 V ~ 5.5 V, ±2.25 V ~ 2.75 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Resistance In Ohms: 25K
• End To End Resistance: 25kohm
• Track Taper: Logarithmic
• Resistance Tolerance: ± 30%
• No. Of Steps: 1024
• Supply Voltage Range: 3V To 5.5V, ± 2.25V To ± 2.75V
• Control Interface: Serial, SPI
• For Use With: EVAL-AD5235EBZ - BOARD EVALUATION FOR AD5235
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Command
Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
In Table 6, command bits are C0 to C3, address bits are A0 to A3, Data Bit D0 to Data Bit D9 are applicable to RDAC, and D0 to D15 are
applicable to EEMEM.
Table 6. 24-Bit Serial Data-Word
RDAC
EEMEM
Command instruction codes are defined in Table 7.
Table 7. Command Operation Truth Table
1
2
3
4
5
5
5
5
The SDO output shifts out the last 24 bits of data clocked into the serial register for daisy-chain operation. Exception: for any instruction following Instruction 9 or
Instruction 10, the selected internal register data is present in Data Byte 0 and Data Byte 1. The instructions following Instruction 9 and Instruction 10 must also be a
full 24-bit data-word to completely clock out the contents of the serial register.
The RDAC register is a volatile scratchpad register that is refreshed at power-on from the corresponding nonvolatile EEMEM register.
Execution of these operations takes place when the CS strobe returns to logic high.
Instruction 3 writes two data bytes (16 bits of data) to EEMEM. In the case of Address 0 and Address 1, only the last 10 bits are valid for wiper position setting.
The increment, decrement, and shift instructions ignore the contents of the shift register, Data Byte 0 and Data Byte 1.
4
5
5
5
5
5
MSB
C3
C3
B23
C3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
C2
C2
C1
C1
C2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
C0
C0
C1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Command Byte 0
Command Byte 0
0
A3
C0
1
0
0
0
0
0
0
0
1
0
1
1
1
1
1
1
0
A2
A3
X
0
0
A3
0
X
0
X
0
A3
0
0
0
X
0
X
0
A1
A2
X
0
0
A2
0
X
0
X
0
A2
0
0
0
X
0
X
A0
A0
1, 2, 3
A1
X
0
0
A1
0
X
0
X
0
A1
0
0
0
X
0
X
X
D15
B16
A0
X
A0
A0
A0
A0
X
A0
X
0
A0
A0
X
A0
X
A0
A0
X
D14
B15
X
X
X
X
D15
X
X
X
X
X
X
X
X
X
X
X
X
Rev. D | Page 19 of 32
X
D13
Data Byte 1
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
Data Byte 1
X
D12
D9
X
X
X
X
X
X
X
X
X
X
D9
X
X
X
X
X
D11
B8
D8
X
X
X
D8
X
X
X
X
X
X
X
D8
X
X
X
X
X
B7
D7
X
X
D7
X
X
X
X
X
X
X
D7
X
X
X
X
X
D10
Data Byte 0
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
D9
D9
B0
D0
X
X
X
X
X
X
X
X
X
D0
X
X
X
X
D0
X
D8
D8
Operation
NOP. Do nothing. See
Restore EEMEM (A0) contents to RDAC (A0)
register. See
Store wiper setting. Store RDAC (A0) setting to
EEMEM (A0). See
Store contents of Serial Register Data Byte 0
and Serial Register Data Bytes 1 (total 16 bits)
to EEMEM (ADDR). See
Decrement by 6 dB. Right-shift contents of
RDAC (A0) register, stop at all 0s.
Decrement all by 6 dB. Right-shift contents of
all RDAC registers, stop at all 0s.
Decrement contents of RDAC (A0) by 1,
stop at all 0s.
Decrement contents of all RDAC registers by 1,
stop at all 0s.
Reset. Refresh all RDACs with their corresponding
EEMEM previously stored values.
Read contents of EEMEM (ADDR) from
SDO output in the next frame. See
Read RDAC wiper setting from SDO output
in the next frame. See
Write contents of Serial Register Data Byte 0
and Serial Register Data Byte 1 (total 10 bits)
to RDAC (A0). See
Increment by 6 dB: Left-shift contents of RDAC
(A0), stop at all 1s. See
Increment all by 6 dB. Left-shift contents of
all RDAC registers, stop at all 1s.
Increment contents of RDAC (A0) by 1,
stop at all 1s. See
Increment contents of all RDAC registers by 1,
stop at all 1s.
D7
D7
D6
D6
Table 16
D5
D5
Data Byte 0
Table 15
Table 15
Table 14
D4
D4
Table 19
.
Table 20
Table 17
Table 18
D3
D3
.
.
.
D2
D2
.
.
.
AD5235
Table 19
D1
D1
LSB
D0
D0
.