ISL23711UIU10Z-T Intersil, ISL23711UIU10Z-T Datasheet - Page 6

• Manufacturer Part Number: ISL23711UIU10Z-T
• Description: IC POT DIGITAL CONTROL 10-MSOP
• Manufacturer: Intersil
• Series: XDCP™r

Specifications of ISL23711UIU10Z-T

• Taps: 128
• Resistance (ohms): 50K
• Number Of Circuits: 1
• Temperature Coefficient: 50 ppm/°C Typical
• Memory Type: Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Resistance In Ohms: 50K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISL23711UIU10Z-TTR

NOTES:
Test Circuit
Equivalent Circuit
Pin Descriptions
Potentiometer Pins
R
The high (R
equivalent to the fixed terminals of a mechanical
potentiometer. The terminology of R
relative position of the terminal in relation to wiper movement
direction selected by the I
potential on the terminal.
10. RDNL = (R
12.
13. This parameter is not 100% tested.
14. These are I
11. RINL = [R
1. Typical values are for T
2. LSB: [V(RW)
3. ZS error = (V(RW)
4. FS error = [V(RW)
5. DNL = [V(RW)
6. INL = V(RW)
7.
8. MI =
9. Roffset = R
H
AND R
incremental voltage when changing from one tap to an adjacent tap.
for i = 16 to 120 decimal, Max( ) is the maximum value of the wiper voltage and Min ( ) is the minimum value of the wiper voltage over the
temperature range.
Roffset = R
for i = 16 to 127, Max( ) is the maximum value of the resistance and Min ( ) is the minimum value of the resistance over the temperature range.
TC
TC
R
V
|
R
=
=
127
L
--------------------------------------------------------------------------------------------- -
[
--------------------------------------------------------------- -
[
H
Max V RW
R
Max Ri
i
[
H
) and low (R
Max V RW
Max Ri
– (MI • i) – R
i
0
127
2
– R
– R
C specific parameters and are not directly tested, however they are used during device testing to validate device specification.
127
i
/ MI, when measuring between R
– (i • LSB – V(RW)
(
(
i
0
/ MI, when measuring between R
– V(RW)
(
i-1
(
|
(
– V(RW)
/ 127. R
)
) / MI, for i = 16 to 127.
127
(
0
+
) Min Ri
– V-) / LSB.
–
Min Ri
C
)
– V
i
H
A
)
)
0
i-1
i
L
2
+
) Min V RW
] / MI, for i = 16 to 127.
(
127
= 25°C and
0
CC
) terminals of the ISL23711 are
R
C serial input and not the voltage
–
(
] / LSB-1, for i = 1 to 127. i is the DCP register setting.
Min V RW
] / 127. V(RW)
TOTAL
R
)
] / LSB.
R
W
and R
] 2 ⁄
6
)
W
(
]
TEST POINT
(
0
C
(
×
FORCE
CURRENT
) for i = 1 to 127.
W
(
0
---------------- -
125°C
L
10
are the measured resistances for the DCP register set to 7F hex and 00 hex respectively.
±
and R
)
5V supply voltage.
i
6
)
)
i
127
] 2 ⁄
)
C
H
and V(RW)
L
×
W
---------------- -
125°C
references the
R
10
W
and R
L
6
and R
L
.
0
H
are V(RW) for the DCP register set to 7F hex and 00 hex respectively. LSB is the
.
ISL23711
R
R
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the control inputs.
BUS INTERFACE PINS
Serial Data Input/Output (SDA)
The SDA is a bidirectional serial data input/output pin for the
I
wiper register address and data from an I
device at the rising edge of the serial clock SCL, and it shifts
out data after each falling edge of the serial clock SCL.
SDA requires an external pull-up resistor, since it’s an open
drain output.
Serial Clock (SCL)
This input is the serial clock of the I
Device Address (A1-A0)
The Address inputs are used to set the least significant 2 bits
of the 7-bit I
address serial data stream must be made with the Address
input pins in order to initiate communication with the
ISL23711. A maximum of 4 ISL23711 devices may occupy
the I
Principles of Operation
The ISL23711 is an integrated circuit incorporating one DCP
with It’s associated register, and an I
providing direct communication between a host and the
potentiometer and memory. The resistor array is comprised
2
W
w
C interface. It receives device address, operation code,
is the wiper terminal and is equivalent to the movable
2
C serial bus.
2
C interface slave address. A match in the slave
2
C serial interface.
2
C serial interface
2
C external master
August 16, 2005
FN6127.0