X9315TSIZT1 Intersil, X9315TSIZT1 Datasheet - Page 15

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X9315TSIZT1

Manufacturer Part Number
X9315TSIZT1
Description
IC XDCP 32-TAP 100K 3WIRE 8-SOIC
Manufacturer
Intersil
Series
XDCP™r
Datasheet

Specifications of X9315TSIZT1

Taps
32
Resistance (ohms)
100K
Number Of Circuits
1
Temperature Coefficient
300 ppm/°C Typical
Memory Type
Non-Volatile
Interface
Up/Down (3-Wire)
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Resistance In Ohms
100K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Plastic Dual-In-Line Packages (PDIP)
MDP0031
PLASTIC DUAL-IN-LINE PACKAGE
NOTES:
1. Plastic or metal protrusions of 0.010” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions E and eA are measured with the leads constrained perpendicular to the seating plane.
4. Dimension eB is measured with the lead tips unconstrained.
5. 8 and 16 lead packages have half end-leads as shown.
SEATING
PLANE
SYMBOL
A1
A2
E1
eA
eB
b2
A
D
E
N
b
c
e
L
L
L
e
PDIP8
0.210
0.015
0.130
0.018
0.060
0.010
0.375
0.310
0.250
0.100
0.300
0.345
0.125
8
D
15
PDIP14
0.210
0.015
0.130
0.018
0.060
0.010
0.750
0.310
0.250
0.100
0.300
0.345
0.125
14
b
NOTE 5
A1
A2
A
PDIP16
0.210
0.015
0.130
0.018
0.060
0.010
0.750
0.310
0.250
0.100
0.300
0.345
0.125
16
c
X9315
PDIP18
0.210
0.015
0.130
0.018
0.060
0.010
0.890
0.310
0.250
0.100
0.300
0.345
0.125
18
eA
eB
E
PDIP20
0.210
0.015
0.130
0.018
0.060
0.010
1.020
0.310
0.250
0.100
0.300
0.345
0.125
20
E1
TOLERANCE
+0.010/-0.015
+0.004/-0.002
+0.015/-0.010
Reference
±0.005
±0.002
±0.010
±0.005
±0.025
±0.010
Basic
Basic
MAX
MIN
N
1
PIN #1
INDEX
2
b2
December 21, 2009
NOTES
Rev. B 2/99
1
2
FN8179.2
N/2

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