X9315USIZ-2.7T1 Intersil, X9315USIZ-2.7T1 Datasheet - Page 5

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X9315USIZ-2.7T1

Manufacturer Part Number
X9315USIZ-2.7T1
Description
IC XDCP 32-TAP 50K 3WIRE 8-SOIC
Manufacturer
Intersil
Series
XDCP™r
Datasheet

Specifications of X9315USIZ-2.7T1

Taps
32
Resistance (ohms)
50K
Number Of Circuits
1
Temperature Coefficient
300 ppm/°C Typical
Memory Type
Non-Volatile
Interface
Up/Down (3-Wire)
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Resistance In Ohms
50K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Mode Selection
changed by the system or until a power-up/down cycle
recalled the previously stored data.
This procedure allows the system to always power-up to a
preset value stored in nonvolatile memory; then during
system operation minor adjustments could be made. The
adjustments might be based on user preference, system
parameter changes due to temperature drift, etc...
The state of U/D may be changed while CS remains LOW.
This allows the host system to enable the device and then
move the wiper up and down until the proper trim is attained.
CS
H
L
L
INC
H
X
L
L
L
U/D
H
X
X
X
H
L
L
Wiper up
Wiper down
Store wiper position to nonvolatile
memory
Standby
No store, return to standby
Wiper Up (not recommended)
Wiper Down (not recommended)
5
MODE
X9315
Power-up and Down Requirements
There are no restrictions on the power-up or power-down
conditions of V
potentiometer pins provided that V
positive than or equal to V
V
W
. The V
CC
ramp rate spec is always in effect.
CC
and the voltages applied to the
H
, V
L
, and V
CC
is always more
W
, i.e., V
December 21, 2009
CC
≥ V
FN8179.2
H
, V
L
,

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