X9418WV24Z-2.7 Intersil, X9418WV24Z-2.7 Datasheet - Page 6

• Manufacturer Part Number: X9418WV24Z-2.7
• Description: IC XDCP DUAL 64TAP 10K 24-TSSOP
• Manufacturer: Intersil
• Series: XDCP™r

Specifications of X9418WV24Z-2.7

• Taps: 64
• Resistance (ohms): 10K
• Number Of Circuits: 2
• Temperature Coefficient: 300 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Resistance In Ohms: 10K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 1. Instruction Set
Note: (7) 1/0 = data is one or zero
Figure 4. Three-Byte Instruction Sequence
Figure 5. Increment/Decrement Instruction Sequence
Read Wiper Counter
Register
Write Wiper Counter
Register
Read Data Register
Write Data Register
XFR Data Register to
Wiper Counter Register
XFR Wiper Counter
Register to Data Register
Global XFR Data
Registers to Wiper
Counter Registers
Global XFR Wiper
Counter Registers to
Data Register
Increment/Decrement
Wiper Counter Register
SCL
SDA
SCL
SDA
Instruction
S
T
A
R
T
S
T
A
R
T
0
0
1
1
0
0
1
1
A3 A2 A1 A0 A
6
I
1
1
1
1
1
1
0
1
0
A3 A2 A1 A0
3
I
0
0
0
1
1
1
0
0
0
2
I
0
1
1
0
0
1
0
0
1
1
Instruction Set
C
K
I
1
0
1
0
1
0
1
0
0
0
I3
A
C
K
1/0 1/0
1/0 1/0
R
1/0 1/0
1/0 1/0
1/0 1/0
1/0 1/0
0
0
0
I3
I2
1
R
I2
I1 I0
0
0
0
0
X9418
I1
P
0
0
0
0
0
0
0
0
0
1
R1 R0 0
I0
1/0 Read the contents of the Wiper Counter Register
1/0 Write new value to the Wiper Counter Register
1/0 Read the contents of the Data Register pointed to by
1/0 Write new value to the Data Register pointed to by
1/0 Transfer the contents of the Data Register pointed to
1/0 Transfer the contents of the Wiper Counter Register
1/0 Enable Increment/decrement of the Wiper Counter
P
0
0
X
R1
0
R0
pointed to by P
pointed to by P
P
P
by P
Register
pointed to by P
R
Transfer the contents of the Data Registers pointed
to by R
Counter Registers
Transfer the contents of both Wiper Counter
Registers to their respective data Registers pointed
to by R
Register pointed to by P
X
0
0
1
P0 A
and R
and R
- R
0
0
and R
0
C
K
1
1
P0 A
- R
- R
1
1
0
- R
- R
0
0
1
C
K
of both pots to their respective Wiper
of both pots
0
0
- R
0
0
0
0
N
C
1
to the Data Register pointed to by
I
0
D5 D4 D3 D2 D1 D0
to its associated Wiper Counter
Operation
N
C
2
I
0
N
C
n
I
D
E
C
1
D
E
C
October 12, 2006
n
A
C
K
O
S
T
O
P
S
T
P
FN8194.3