PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 362

• Manufacturer Part Number: PIC18F67K22-I/MR
• Description: 128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F67K22-I/MR

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
23.3
For the A/D Converter to meet its specified accuracy,
the Charge Holding (C
to fully charge to the input channel voltage level. The
analog input model is shown in
source impedance (R
switch (R
required to charge the capacitor C
switch (R
(V
The source impedance affects the offset voltage at the
analog input (due to pin leakage current). The maxi-
mum recommended impedance for analog sources
is 2.5 k . After the analog input channel is selected or
changed, the channel must be sampled for at least the
minimum acquisition time before starting a conversion.
EQUATION 23-1:
EQUATION 23-2:
EQUATION 23-3:
DS39960D-page 362
T
V
or
T
T
T
T
Temperature coefficient is only required for temperatures > 25C. Below 25C, T
T
T
ACQ
DD
Note:
C
ACQ
AMP
COFF
C
ACQ
HOLD
).
=
=
A/D Acquisition Requirements
SS
=
=
=
=
=
SS
=
=
When the conversion is started, the
holding capacitor is disconnected from the
input pin.
) impedance varies over the device voltage
Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
T
) impedance directly affect the time
AMP
T
0.2 s
(Temp – 25C)(0.02 s/C)
(85C – 25C)(0.02 s/C)
1.2 s
-(C
-(25 pF) (1 k + 2 k + 2.5 k) ln(0.0004883) s
1.05 s
0.2 s + 1.05 s + 1.2 s
2.45 s
(V
-(C
AMP
HOLD
+ T
REF
HOLD
+ T
C
HOLD
– (V
ACQUISITION TIME
A/D MINIMUM CHARGING TIME
CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
S
+ T
)(R
C
) and the internal sampling
)(R
+ T
REF
COFF
IC
) capacitor must be allowed
IC
+ R
COFF
/2048)) • (1 – e
+ R
SS
SS
HOLD
+ R
+ R
Figure
S
S
) ln(1/2048) s
. The sampling
) ln(1/2048)
(-T
23-5. The
C
/C
HOLD
(R
IC
+ R
SS
+ R
S
To
Equation 23-1
that 1/2 LSb error is used (1,024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
Equation 23-3
required acquisition time, T
based
assumptions:
))
• C
• Rs
• Conversion Error  1/2 LSb
• V
• Temperature
)
DD
HOLD
calculate
on
COFF
shows the calculation of the minimum
the
can be used. This equation assumes
= 0 ms.
the
 2009-2011 Microchip Technology Inc.
= 25 pF
= 2.5 k 
= 3V  Rss = 2 k 
= 85  C
following
minimum
ACQ
. This calculation is
application
acquisition
system
time,