CAT5419WI-50-T1 ON Semiconductor, CAT5419WI-50-T1 Datasheet - Page 9
![no-image](/images/manufacturer_photos/0/4/495/on_semiconductor_sml.jpg)
CAT5419WI-50-T1
Manufacturer Part Number
CAT5419WI-50-T1
Description
IC POT DPP 50K 64TAP 24SOIC
Manufacturer
ON Semiconductor
Specifications of CAT5419WI-50-T1
Taps
64
Resistance (ohms)
50K
Number Of Circuits
2
Temperature Coefficient
300 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Resistance In Ohms
50K
Number Of Elements
2
# Of Taps
64
Resistance (max)
50KOhm
Power Supply Requirement
Single
Interface Type
Serial (2-Wire/I2C)
Single Supply Voltage (typ)
3.3/5V
Dual Supply Voltage (typ)
Not RequiredV
Single Supply Voltage (min)
2.5V
Single Supply Voltage (max)
6V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
24
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Instructions and Register Description
INSTRUCTIONS
Slave Address Byte
processor is called the Slave/DPP Address Byte. The most
significant four bits of the slave address are a device type
identifier. These bits for the CAT5419 are fixed at 0101[B]
(refer to Figure 8).
and must match the physical device address which is defined
by the state of the A3 − A0 input pins for the CAT5419 to
successfully continue the command sequence. Only the
device which slave address matches the incoming device
address sent by the master executes the instruction. The A3
− A0 inputs can be actively driven by CMOS input signals
or tied to V
The first byte sent to the CAT5419 from the master/
The next four bits, A3 − A0, are the internal slave address
CC
or V
(MSB)
(MSB)
ID3
I3
SS
0
.
Device Type Identifier
ID2
I2
1
Instruction
Opcode
ID1
Figure 8. Identification Byte Format
I1
Figure 9. Instruction Byte Format
0
http://onsemi.com
ID0
I0
1
9
Instruction Byte
instruction and register pointer information. The four most
significant bits used provide the instruction opcode I [3:0].
The R1 and R0 bits point to one of the four data registers of
each associated potentiometer. The least two significant bits
point to one of two Wiper Control Registers. The format is
shown in Figure 9.
Table 11. DATA REGISTER SELECTION
R1
The next byte sent to the CAT5419 contains the
Data Register
A3
Selection
Data Register Selected
R0
A2
Slave Address
DR0
DR1
DR2
DR3
WCR/Pot Selection
0
A1
(LSB)
(LSB)
A0
P0
R1
0
0
1
1
R0
0
1
0
1