AD5203AN10 Analog Devices Inc, AD5203AN10 Datasheet - Page 11

• Manufacturer Part Number: AD5203AN10
• Description: IC DGTL POT QUAD 64POS 24-DIP
• Manufacturer: Analog Devices Inc

Specifications of AD5203AN10

• Rohs Status: RoHS non-compliant
• Taps: 64
• Resistance (ohms): 10K
• Number Of Circuits: 4
• Temperature Coefficient: 700 ppm/°C Typical
• Memory Type: Volatile
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 24-DIP (0.300", 7.62mm)
• Resistance In Ohms: 10K
• Number Of Elements: 4
• # Of Taps: 64
• Resistance (max): 10KOhm
• Power Supply Requirement: Single
• Interface Type: Serial (3-Wire/SPI)
• Single Supply Voltage (typ): 3/5V
• Dual Supply Voltage (typ): Not RequiredV
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 24
• Lead Free Status / Rohs Status: Not Compliant

REV. 0
The data setup and data hold times in the specification table
determine the data valid time requirements. The last eight bits
of the data word entered into the serial register are held when
CS returns high. At the same time CS goes high it gates the
address decoder which enables one of four positive edge trig-
gered RDAC latches, see Figure 36 detail.
The target RDAC latch is loaded with the last six bits of the
serial data word completing one RDAC update. Four separate
8-bit data words must be clocked in to change all four VR
settings.
Figure 37. Detail, SDO Output Schematic of the AD5203
SHDN
CLK
SDI
Figure 36. Equivalent Input Control Logic
CS
RS
CLK
SDI
CS
REGISTER
SERIAL
AD5203
D
CK RS
Q
REGISTER
DECODE
SERIAL
ADDR
RDAC 1
RDAC 2
RDAC 4
SDO
–11–
All digital inputs are protected with a series input resistor and
parallel Zener ESD structure shown in Figure 38. Applies to
digital input pins CS, SDI, SDO, RS, SHDN, CLK.
DYNAMIC CHARACTERISTICS
The total harmonic distortion plus noise (THD+N) measures
0.003% using an offset ground with a rail-to-rail OP279 invert-
ing op amp test circuit, see Figure 30. Figure 15 plots THD
versus frequency for both inverting and noninverting amplifier
topologies. Thermal noise is primarily Johnson noise, typically
9 nV/ Hz for the 10 k version measured at 1 kHz. For the
100 k device, thermal noise measures 29 nV/ Hz. Channel-to-
channel crosstalk measures less than –65 dB at f = 100 kHz. To
achieve this isolation, the extra ground pins (AGND) located
between the potentiometer terminals (A, B, W) must be con-
nected to circuit ground. The AGND and DGND pins should
be at the same voltage potential. Any unused potentiometers in
a package should be connected to ground. Power supply rejec-
tion is typically –50 dB at 10 kHz (care is needed to minimize
power supply ripple injection in high accuracy applications).
Figure 38. Equivalent ESD Protection Circuit
1k
LOGIC
AD5203