X93255UV14IT1 Intersil, X93255UV14IT1 Datasheet - Page 5
![IC XDCP DUAL 32-TAP 50K 14-TSSOP](/photos/6/58/65830/20-14-tssop_sml.jpg)
X93255UV14IT1
Manufacturer Part Number
X93255UV14IT1
Description
IC XDCP DUAL 32-TAP 50K 14-TSSOP
Manufacturer
Intersil
Series
XDCP™r
Datasheet
1.X93255UV14I.pdf
(7 pages)
Specifications of X93255UV14IT1
Taps
32
Resistance (ohms)
50K
Number Of Circuits
2
Temperature Coefficient
35 ppm/°C Typical
Memory Type
Non-Volatile
Interface
Up/Down (3-Wire)
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Resistance In Ohms
50K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
AC Timing
Power-up and Power-down Requirements
There are no restrictions on the power-up or power-down
conditions of V
potentiometer pins provided that V
positive than or equal to V
V
Pin Descriptions
R
The R
terminals of a variable resistor. The minimum voltage is V
and the maximum is V
references the relative position of the terminal in relation to
wiper movement direction selected by the U/D input per
potentiometer.
Up/Down (U/D)
The U/D input controls the direction of a single
potentiometer’s wiper movement and whether the counter is
incremented or decremented.
Increment (INC)
The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the
pertaining potentiometer’s counter in the direction indicated
by the logic level on the pertaining potentiometer’s U/D
input.
Chip Select (CS)
A potentiometer is selected when the pertaining CS input is
LOW. Its current counter value is stored in nonvolatile
memory when the pertaining CS is returned HIGH while the
pertaining INC input is also HIGH. After the store operation
is complete, the affected potentiometer will be placed in the
low power standby mode until the potentiometer is selected
once again.
CC
H
and R
ramp rate specification is always in effect.
H
Note: CS, INC, U/D, R
to either CS
and R
L
INC
U/D
CS
L
CC
pins of the X93255 are equivalent to the end
1
and the voltages applied to the
or CS
t
CC
CI
2
. The terminology of R
, etc.
H
H
and V
and R
5
L
CC
L
, i.e., V
are used to refer
t
IL
is always more
t
ID
t
CYC
CC
≥ V
t
H
IH
H,
and R
V
L
. The
L
t
SS
DI
X93255
t
IC
Principles of Operation
There are multiple sections for each potentiometer in the
X93255: an input control, a counter and decode section; the
nonvolatile memory; and a resistor array. Each input control
section operates just like an up/down counter. The output of
this counter is decoded to turn on a single electronic switch
connecting a point on the resistor array to the wiper output.
Under the proper conditions, the contents of the counter can
be stored in nonvolatile memory and retained for future use.
Each resistor array is comprised of 31 individual resistors
connected in series. At either end of the array and between
each resistor is an electronic switch that transfers the
connection at that point to the wiper. The wiper is connected
to the R
Each wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
If the wiper is moved several positions, multiple taps are
connected to the wiper for up to 10µs. The 2-terminal
resistance value for the device can temporarily change by a
significant amount if the wiper is moved several positions.
When the device is powered-down, the last wiper position
stored will be maintained in the nonvolatile memory for each
potentiometer. When power is restored, the contents of the
memory are recalled and each wiper is set to the value last
stored.
(STORE)
L
t
CPH
terminal, forming a variable resistor from R
t
F
90%
10%
90%
t
R
February 4, 2008
H
FN8187.1
to R
L
.