MCP4921-E/SN Microchip Technology, MCP4921-E/SN Datasheet - Page 27

• Manufacturer Part Number: MCP4921-E/SN
• Description: IC DAC 12BIT SNGL W/SPI 8SOIC
• Manufacturer: Microchip Technology

Specifications of MCP4921-E/SN

• Number Of Converters: 1
• Package / Case: 8-SOIC (3.9mm Width)
• Settling Time: 4.5µs
• Number Of Bits: 12
• Data Interface: Serial, SPI™
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Resolution: 12 bit
• Interface Type: Serial (3-Wire, SPI, Microwire)
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Package: 8SOIC N
• Architecture: Resistor-String
• Digital Interface Type: Serial (3-Wire, SPI, Microwire)
• Number Of Outputs Per Chip: 1
• Output Type: Voltage
• Full Scale Error: 1 %FSR
• Integral Nonlinearity Error: ±12 LSB
• Maximum Settling Time: 4.5(Typ) us
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.0
The MCP4901/4911/4921 family devices are general
purpose DACs intended to be used in applications
where precision with low-power and moderate
bandwidth is required.
Applications generally suited for the devices are:
• Set Point or Offset Trimming
• Sensor Calibration
• Digitally-Controlled Multiplier/Divider
• Portable Instrumentation (Battery Powered)
• Motor Control Feedback Loop
6.1
The MCP4901/4911/4921 devices utilize a 3-wire
synchronous serial protocol to transfer the DAC’s setup
and output values from the digital source. The serial
protocol can be interfaced to SPI or Microwire periph-
erals that are common on many microcontrollers,
including Microchip’s PIC
In addition to the three serial connections (CS, SCK
and SDI), the LDAC pin synchronizes the analog output
(V
down “low”, the DAC input code and settings in the
input register are latched into the output register, and
the analog output is updated.
example of the pin connections. Note that the LDAC pin
can be tied low (V
connections from 4 to 3 I/O pins. In this case, the DAC
output can be immediately updated when a valid
16-clock transmission has been received and CS pin
has been raised.
6.2
The typical application will require a bypass capacitor
in order to filter high-frequency noise. The noise can be
induced onto the power supply's traces from various
events such as digital switching or as a result of
changes on the DAC's output. The bypass capacitor
helps to minimize the effect of these noise sources.
Figure 6-1
this example, two bypass capacitors are used in
parallel: (a) 0.1 µF (ceramic) and (b) 10 µF (tantalum).
These capacitors should be placed as close to the
device power pin (V
The power source supplying these devices should be
as clean as possible. If the application circuit has
separate digital and analog power supplies, V
V
 2010 Microchip Technology Inc.
SS
OUT
should reside on the analog plane.
) with the pin event. By bringing the LDAC pin
TYPICAL APPLICATIONS
Digital Interface
Power Supply Considerations
illustrates an appropriate bypass strategy. In
DD
) as possible (within 4 mm).
SS
®
) to reduce the required
MCUs and dsPIC
Figure 6-1
shows an
®
DSCs.
DD
and
FIGURE 6-1:
Diagram.
6.3
Inductively-coupled AC transients and digital switching
noises can degrade the input and output signal
integrity, potentially reducing the device’s performance.
Careful board layout will minimize these effects and
increase the Signal-to-Noise Ratio (SNR). Bench test-
ing has shown that a multi-layer board utilizing a
low-inductance ground plane, isolated inputs, and
isolated outputs with proper decoupling, is critical for
best performance. Particularly harsh environments
may require shielding of critical signals.
Breadboards and wire-wrapped boards are not
recommended if low noise is desired.
C2 = 0.1 µF
C1 = 10 µF
V
V
MCP4901/4911/4921
REF
OUT
C1
V
AV
Layout Considerations
DD
SS
SDI
V
V
REF
OUT
C1
Typical Connection
V
AV
DD
SS
C2
SDI
DS22248A-page 27
LDAC
CS
SDO
SCK
CS
C1
0
1
V
V
DD
SS
C2