DAC104S085CISD/NOPB National Semiconductor, DAC104S085CISD/NOPB Datasheet - Page 6
Manufacturer Part Number
IC DAC 10BIT QUAD 10-LLP
Specifications of DAC104S085CISD/NOPB
Number Of Bits
Number Of Converters
Voltage Supply Source
Power Dissipation (max)
-40°C ~ 105°C
Package / Case
For Use With
DAC104S085EB - BOARD EVALUATION DAC104S085
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
A.C. and Timing Characteristics
Values shown in this table are design targets and are subject to change before product release.
The following specifications apply for V
12 to 1011. Boldface limits apply for T
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions. Operation of the device beyond the maximum Operating Ratings is not recommended.
Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds 5.5V or is less than GND, the current at that pin should be limited to 10 mA. The 20 mA maximum package
input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to two.
Note 4: The absolute maximum junction temperature (T
junction-to-ambient thermal resistance (θ
for maximum power dissipation will be reached only when the device is operated in a severe fault condition (e.g., when input or output pins are driven beyond
the operating ratings, or the power supply polarity is reversed).
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is 220 pF discharged through ZERO Ohms.
Note 6: Reflow temperature profiles are different for lead-free packages.
Note 7: The inputs are protected as shown below. Input voltage magnitudes up to 5.5V, regardless of V
example, if V
Output Voltage Settling Time
Output Slew Rate
Total Harmonic Distortion
SCLK Cycle Time
SCLK High time
SCLK Low Time
SYNC Set-up Time prior to SCLK
Data Set-Up Time prior to SCLK
Data Hold Time after SCLK Falling
SCLK fall prior to rise of SYNC
SYNC High Time
is 3V, the digital input pins can be driven with a 5V logic device.
), and the ambient temperature (T
= +2.7V to +5.5V, V
max) for this device is 150°C. The maximum allowable power dissipation is dictated by T
100h to 300h code change
Code change from 200h to 1FFh
input frequency = 10kHz
= 2 kΩ, C
= 2.5V ± 0.1Vpp
= 2.5V ± 0.1Vpp
and all other limits are at T
= 200 pF
), and can be calculated using the formula P
= 200 pF to GND, f
, will not cause errors in the conversion result. For
= 25°C, unless otherwise specified.
MAX = (T
= 30 MHz, input code range
max − T
) / θ
. The values