AD9788BSVZ Analog Devices Inc, AD9788BSVZ Datasheet - Page 3

IC DAC 16BIT 800MSPS 100TQFP

AD9788BSVZ

Manufacturer Part Number
AD9788BSVZ
Description
IC DAC 16BIT 800MSPS 100TQFP
Manufacturer
Analog Devices Inc
Series
TxDAC®r
Datasheet

Specifications of AD9788BSVZ

Data Interface
Serial
Design Resources
Powering the AD9788 Using ADP2105 for Increased Efficiency (CN0141)
Number Of Bits
16
Number Of Converters
2
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
450mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
Resolution (bits)
16bit
Sampling Rate
800MSPS
Input Channel Type
Parallel
Digital Ic Case Style
QFP
No. Of Pins
100
Operating Temperature Range
-40°C To +85°C
Number Of Channels
2
Resolution
16b
Interface Type
Parallel
Single Supply Voltage (typ)
3.3V
Dual Supply Voltage (typ)
Not RequiredV
Settling Time
0.02us
Architecture
Interpolation Filter
Power Supply Requirement
Analog and Digital
Output Type
Current
Integral Nonlinearity Error
±3.7LSB
Single Supply Voltage (min)
3.13V
Single Supply Voltage (max)
3.47V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP EP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9788-EBZ - BOARD EVAL FOR AD9788
Settling Time
-
Lead Free Status / Rohs Status
Compliant

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SPECIFICATIONS
DC SPECIFICATIONS
T
otherwise noted. LVDS driver and receiver are compliant to the IEEE 1596 reduced range link, unless otherwise noted.
Table 1.
Parameter
RESOLUTION
ACCURACY
MAIN DAC OUTPUTS
MAIN DAC TEMPERATURE DRIFT
AUX DAC OUTPUTS
REFERENCE
ANALOG SUPPLY VOLTAGES
DIGITAL SUPPLY VOLTAGES
POWER CONSUMPTION
OPERATING RANGE
1
Based on a 10 Ω external resistor.
MIN
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
Offset Error
Gain Error (with Internal Reference)
Full-Scale Output Current
Output Compliance Range
Output Resistance
Gain DAC Monotonicity
Settling Time, to Within ±0.5 LSBs
Offset
Gain
Reference Voltage
Resolution
Full-Scale Output Current
Output Compliance Range (Source)
Output Compliance Range (Sink)
Output Resistance
Aux DAC Monotonicity Guaranteed
Internal Reference Voltage
Output Resistance
AVDD33
CVDD18
DVDD33
DVDD18
1× Mode, f
2× Mode, f
4× Mode, f
8× Mode, f
Power-Down Mode
to T
Guaranteed
PLL Off, IF = 2 MHz
Inverse Sinc Off, PLL Off
Inverse Sinc Off, PLL Off
Inverse Sinc Off, PLL Off
MAX
, AVDD33 = 3.3 V, DVDD33 = 3.3 V, DVDD18 = 1.8 V, CVDD18 = 1.8 V, I
DATA
DATA
DATA
DATA
= 100 MSPS,
= 100 MSPS,
= 100 MSPS,
= 100 MSPS,
1
Min
–0.001
8.66
–1.0
–1.998
0
0.8
3.13
1.70
3.13
1.70
–40
AD9785
Typ
12
±0.2
±0.3
0
±2
20.2
10
10
20
0.04
100
30
10
1
10
1.2
5
3.3
1.8
3.3
1.8
375
533
754
1054
2.5
+25
Max
+0.001
31.66
+1.0
+1.998
1.6
1.6
3.47
1.90
3.47
1.90
450
9.0
+85
Rev. A | Page 3 of 64
Min
−0.001
8.66
–1.0
–1.998
0
0.8
3.13
1.70
3.13
1.70
–40
AD9787
Typ
14
±0.5
±1.0
0
±2
20.2
10
10
20
0.04
100
30
10
1
10
1.2
5
3.3
1.8
3.3
1.8
375
533
754
1054
2.5
+25
OUTFS
Max
+0.001
31.66
+1.0
+1.998
1.6
1.6
3.47
1.90
3.47
1.90
450
9.0
+85
= 20 mA, maximum sample rate, unless
AD9785/AD9787/AD9788
Min
−0.001
8.66
–1.0
–1.998
0
0.8
3.13
1.70
3.13
1.70
–40
AD9788
Typ
16
±2.1
±3.7
0
±2
20.2
10
10
20
0.04
100
30
10
1
10
1.2
5
3.3
1.8
3.3
1.8
375
533
754
1054
2.5
+25
Max
+0.001
31.66
+1.998
1.6
1.6
3.47
1.90
450
9.0
+85
+1.0
3.47
1.90
Unit
Bits
LSB
LSB
% FSR
% FSR
mA
V
Bits
ns
ppm/°C
ppm/°C
ppm/°C
Bits
mA
V
V
Bits
V
V
V
V
V
mW
mW
mW
mW
mW
°C

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