MAX5138BGTE+ Maxim Integrated Products, MAX5138BGTE+ Datasheet - Page 11

IC DAC 16BIT SGL 16-TQFN

MAX5138BGTE+

Manufacturer Part Number
MAX5138BGTE+
Description
IC DAC 16BIT SGL 16-TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5138BGTE+

Settling Time
5µs
Number Of Bits
16
Data Interface
DSP, I²C, MICROWIRE™, Parallel, QSPI™, SPI™
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
16-TQFN Exposed Pad
Interface Type
Serial (SPI, QSPI, Microwire, DSP)
Supply Voltage (max)
5.25 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Maximum Power Dissipation
1176.5 mW
Minimum Operating Temperature
- 40 C
Supply Current
1 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
The MAX5138’s DAC code is unipolar binary with V
= (code/65536) x V
face commands.
The MAX5139’s DAC code is unipolar with V
(code/4096) x V
commands.
Connect the MAX5138/MAX5139 DVDD supply to the
supply of the host DSP or microprocessor. The AVDD
supply may be set to any voltage within the 2.7V to
5.25V operating range, but must be greater than or
equal to the DVDD supply.
Write to the MAX5138/MAX5139 using the following
sequence:
1) Drive CS low, enabling the shift register.
2) Clock 24 bits of data into DIN (C7 first and D0 last),
Figure 2. Connections for MICROWIRE
Figure 4. READY Timing
observing the specified setup and hold times. Bits
READY 1
READY 2
READY 3
*THE READY-TO-SI CONNECTION IS NOT REQUIRED FOR WRITING TO THE
*MAX5138/MAX5139 BUT MAY BE USED FOR TRANSMISSION VERIFICATION.
SCLK
DIN
CS
Writing to the MAX5138/MAX5139
MAX5138
MAX5139
1
REF
2
______________________________________________________________________________________
READY*
REF
. See Table 1 for the serial interface
3
SCLK
DIN
CS
. See Table 1 for the serial inter-
4
SLAVE 1 DATA
20
21
SO
SK
SI*
I/O
22
MICROWIRE
23 24
PORT
Buffered Voltage-Output DACs
Low-Power, Single, 16-/12-Bit,
1
OUT
2
OUT
3
=
4
SLAVE 2 DATA
5
3) After clocking in the last data bit, drive CS high. CS
Figure 1 shows a write operation for the transmission of
24 bits. If CS is driven high at any point prior to receiving
24 bits, the transmission is discarded.
Connect READY to a microcontroller (µC) input to moni-
tor the serial interface for valid communications. The
READY pulse appears 24 clock cycles after the nega-
tive edge of CS (Figure 4). Since the MAX5138/
MAX5139 look at the first 24 bits of the transmission fol-
lowing the falling edge of CS, it is possible to daisy
chain devices with different command word lengths.
READY goes high 16ns after CS is driven high.
Figure 3. Connections for SPI/QSPI
D15–D0 are the data bits that are written to the
internal register.
must remain high for 33ns before the next transmis-
sion is started.
21
*THE READY-TO-MISO CONNECTION IS NOT REQUIRED FOR WRITING TO THE
MAX5138/MAX5139 BUT MAY BE USED FOR TRANSMISSION VERIFICATION.
22
23 24
MAX5138
MAX5139
1
READY*
2
SCLK
DIN
CS
3
4
SLAVE 3 DATA
5
MOSI
MISO*
SCK
I/O
21
SPI/QSPI
PORT
+5V
22
SS
23 24
READY
11

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