AD9760AR Analog Devices Inc, AD9760AR Datasheet - Page 5

IC DAC 10BIT 125MSPS 28-SOIC

AD9760AR

Manufacturer Part Number
AD9760AR
Description
IC DAC 10BIT 125MSPS 28-SOIC
Manufacturer
Analog Devices Inc
Series
TxDAC®r
Datasheet

Specifications of AD9760AR

Mounting Type
Surface Mount
Rohs Status
RoHS non-compliant
Settling Time
35ns
Number Of Bits
10
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
175mW
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Update Rate
125MSPS
Peak Reflow Compatible (260 C)
No
Supply Voltage
5V
No. Of Bits
10 Bit
Leaded Process Compatible
No
Interface Type
Parallel
Resolution
10-Bit
For Use With
AD9760-EBZ - BOARD EVAL FOR AD9760
Data Interface
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9760AR
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD9760AR50
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD9760ARU
Manufacturer:
AD
Quantity:
64
Part Number:
AD9760ARU
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD9760ARU50
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD9760ARUZ
Quantity:
6 223
Part Number:
AD9760ARUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD9760ARZ
Quantity:
20
Part Number:
AD9760ARZ-REEL
Manufacturer:
AD
Quantity:
3 400
Pin No.
1
2–9
10
11–14, 25 NC
15
16
17
18
19
20
21
22
23
24
26
27
28
REV. B
Name
DB9
DB8–DB1
DB0
SLEEP
REFLO
REFIO
FS ADJ
COMP1
ACOM
I
I
COMP2
AVDD
DCOM
DVDD
CLOCK
OUTB
OUTA
Description
Most Significant Data Bit (MSB).
Data Bits 1–8.
Least Significant Data Bit (LSB).
No Internal Connection.
Power-Down Control Input. Active High. Contains active pull-down circuit, thus may be left unterminated if
not used.
Reference Ground when Internal 1.2 V Reference Used. Connect to AVDD to disable internal reference.
Reference Input/Output. Serves as reference input when internal reference disabled (i.e., Tie REFLO to
AVDD). Serves as 1.2 V reference output when internal reference activated (i.e., Tie REFLO to ACOM).
Requires 0.1 µF capacitor to ACOM when internal reference activated.
Full-Scale Current Output Adjust.
Bandwidth/Noise Reduction Node. Add 0.1 µF to AVDD for optimum performance.
Analog Common.
Complementary DAC Current Output. Full-scale current when all data bits are 0s.
DAC Current Output. Full-scale current when all data bits are 1s.
Internal Bias Node for Switch Driver Circuitry. Decouple to ACOM with 0.1 µF capacitor.
Analog Supply Voltage (+2.7 V to +5.5 V).
Digital Common.
Digital Supply Voltage (+2.7 V to +5.5 V).
Clock Input. Data latched on positive edge of clock.
PIN FUNCTION DESCRIPTIONS
(MSB) DB9
PIN CONFIGURATION
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
NC
NC
NC
NC
10
11
12
13
14
1
2
3
4
5
6
8
9
NC = NO CONNECT
7
(Not to Scale)
AD9760
TOP VIEW
–5–
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CLOCK
DVDD
DCOM
NC
AVDD
COMP2
I
ACOM
COMP1
FS ADJ
REFIO
REFLO
SLEEP
I
OUTA
OUTB
AD9760

Related parts for AD9760AR