LMX1600EVAL National Semiconductor, LMX1600EVAL Datasheet - Page 3

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LMX1600EVAL

Manufacturer Part Number
LMX1600EVAL
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LMX1600EVAL

Lead Free Status / Rohs Status
Not Compliant
16-pin CSP
Pin No. for
Pin Descriptions
Package
16
10
11
12
13
14
15
1
2
3
4
5
6
7
8
9
Pin No. for
Package
TSSOP
16-pin
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
FoLD
OSC
OSC
GND
fin
V
CPo
EN
EN
CPo
V
fin
GND
LE
Data
Clock
Pin Name
CC AUX
CC MAIN
AUX
MAIN
AUX
MAIN
AUX
MAIN
IN
OUT
I/O
O
O
O
O
I
I
I
I
I
I
I
I
Multiplexed output of the Main/Aux programmable or reference dividers
and Main/Aux lock detect. CMOS output. (See Programming Description
2.5)
PLL reference input which drives both the Main and Aux R counter
inputs. Has about 1.2V input threshold and can be driven from an
external CMOS or TTL logic gate. Typically connected to a TCXO output.
Can be used with an external resonator (See Programming Description
2.5.4).
Oscillator output. Used with an external resonator.
Aux PLL ground.
Aux prescaler input. Small signal input from the VCO.
Aux PLL power supply voltage input. Must be equal to V
range from 2.7V to 3.6V. Bypass capacitors should be placed as close
as possible to this pin and be connected directly to the ground plane.
Aux PLL Charge Pump output. Connected to a loop filter for driving the
control input of an external VCO.
Powers down the Aux PLL when LOW (N and R counters, prescaler, and
tristates charge pump output). Bringing EN
PLL.
Powers down the Main PLL when LOW (N and R counters, prescaler,
and tristates charge pump output). Bringing EN
Main PLL.
Main PLL Charge Pump output. Connected to a loop filter for driving the
control input of an external VCO.
Main PLL power supply voltage input. Must be equal to V
range from 2.7V to 3.6V. Bypass capacitors should be placed as close
as possible to this pin and be connected directly to the ground plane.
Main prescaler input. Small signal input from the VCO.
Main PLL ground.
Load enable high impedance CMOS input. Data stored in the shift
registers is loaded into one of the 4 internal latches when LE goes HIGH
(control bit dependent).
High impedance CMOS input. Binary serial data input. Data entered MSB
first. The last two bits are the control bits.
High impedance CMOS Clock input. Data for the various counters is
clocked in on the rising edge, into the 18-bit shift register.
3
Description
AUX
HIGH powers up the Aux
MAIN
HIGH powers up the
CC MAIN
CC AUX
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