PEF2054NV21XK Lantiq, PEF2054NV21XK Datasheet - Page 27

• Manufacturer Part Number: PEF2054NV21XK
• Manufacturer: Lantiq

Specifications of PEF2054NV21XK

• Lead Free Status / Rohs Status: Compliant

• Interrupt, INT
2
In the following chapters the functions of the PEB 2055 will be covered in more detail.
2.1
All registers and the FIFOs of the EPIC are accessible via the flexible bus interface
supporting Siemens / Intel and Motorola type microprocessors. Depending on the
register functionality a read, write or read/write access is possible.
The bus interface consists of the following elements
• Data bus, 8-bit wide, D7 .. 0
• Address bus, 4-bit wide, A3 .. 0
• Chip select, CS
• Address latch enable, ALE
• Two read/write control lines: RD and WR (Intel mode) or DS and R/W (Motorola
• Reset, RES
The ALE line is used to control the bus structure and interface type.
Table 1
Selectable Bus Configurations
ALE
Fixed to
Fixed to ground
Switching
Figure 15
Selectable Bus Interface Structures
Semiconductor Group
mode)
D0-7
Functional Description
Bus Interface
V
EPIC
DD
A
Type Interface
0-3
R
with Motorola
DS
R/W
Interface
Motorola
Siemens / Intel
Siemens / Intel
CS
D
0-7
EPIC
Interface,
R
A0-3
Address/Data Bus
with Siemens/Intel Type
Bus Structure
demultiplexed
demultiplexed
multiplexed
27
Demultiplexed
RD
WR
CS
ALE
EPIC
Pin 28
DS
RD
RD
Functional Description
Interface,
AD
R
Address/Data Bus
with Siemens/Intel Type
0-7
Multiplexed
RD
Pin 29
R/W
WR
WR
WR
PEB 2055
PEF 2055
ITS09543
CS