5962-89629013A Analog Devices Inc, 5962-89629013A Datasheet - Page 4

• Manufacturer Part Number: 5962-89629013A
• Manufacturer: Analog Devices Inc

Specifications of 5962-89629013A

• Converter Type: ADC/DAC
• Resolution: 8b
• Data Rate: 0.5MSPS
• Digital Interface Type: Parallel
• Pin Count: 28
• Lead Free Status / Rohs Status: Not Compliant

ABSOLUTE MAXIMUM RATINGS
V
V
V
AGND
AGND
Logic Voltage to DGND . . . . . . . . . . . . . –0.3 V, V
CLK Input Voltage to DGND . . . . . . . . . –0.3 V, V
V
V
NOTE
1
Parameter
DAC Timing
ADC Timing
NOTES
1
2
3
Specifications subject to change without notice.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7569/AD7669 features proprietary ESD protection circuitry, permanent dam-
age may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
AD7569/AD7669–TIMING CHARACTERISTICS
power dissipation of the package is not exceeded. Typical short circuit current for
a short to AGND or V
Output may be shorted to any voltage in the range V
Sample tested at +25 C to ensure compliance. All input control signals are specified with t
t
t
13
l4
DD
DD
DD
OUT
IN
AGND
is defined as the time required for the data line to change 0.5 V when loaded with the circuit of Figure 2.
and t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
to AGND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
to AGND
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
to V
Figure 1. Load Circuits for Data Access Time Test
2
3
2
(V
17
DAC
DAC
OUT
are measured with the load circuits of Figure 1 and defined as the time required for an output to cross either 0.8 V or 2.4 V.
SS
a. High-Z to V
1
DAC
or AGND
to AGND
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +14 V
A, V
ADC
DAC
. . . . . . . . . . . . . . . . . V
Limit at
25 C (All Grades)
80
0
0
60
10
50
110
20
0
0
60
0
60
95
10
60
65
120
60
90
OUT
SS
. . . . . . . . . . . . . . . V
or AGND
B) to
is 50 mA.
ADC
ADC
OH
to DGND . . . . –0.3 V, V
. . . . . . . . . . . . . . . . . . . . . . . . . 5 V
ADC
. . . . . . . . . . . . . –0.3 V, +7 V
Limit at
T
(J, K, A, B Grades)
80
0
0
70
10
50
130
30
0
0
75
0
75
120
10
75
75
140
75
115
SS
SS
MIN
b. High-Z to V
– 0.3 V, V
– 0.3 V, V
SS
, T
to V
MAX
DD
provided that the
DD
DD
DD
DD
DD
OL
+ 0.3 V
+ 0.3 V
+ 0.3 V
+ 0.3 V
+ 0.3 V
Limit at
T
(S, T Grades)
90
0
0
80
10
50
150
30
0
0
90
0
90
135
10
85
85
160
90
135
MIN
–4–
R
= t
, T
1
F
Power Dissipation (Any Package) to +75 C . . . . . . . . 450 mW
Operating Temperature Range
Storage Temperature Range . . . . . . . . . . . . –65 C to +150 C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . +300 C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
(See Figures 8, 10, 12; V
= 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
MAX
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other condition above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Derates above 75 C by . . . . . . . . . . . . . . . . . . . . . 6 mW/ C
Commercial (J, K) . . . . . . . . . . . . . . . . . . . . . . 0 C to +70 C
Industrial (A, B) . . . . . . . . . . . . . . . . . . . . . –40 C to +85 C
Extended (S, T) . . . . . . . . . . . . . . . . . . . . –55 C to +125 C
Figure 2. Load Circuits for Bus Relinquish Time Test
a. V
OH
Units
ns min
ns min
ns min
ns min
ns min
ns min
ns max
ns max
ns min
ns min
ns min
ns min
ns max
ns max
ns min
ns max
ns max
ns max
ns max
ns max
to High-Z
WR Pulse Width
CS, A/B to WR Setup Time
CS, A/B to WR Hold Time
ST Pulse Width
ST to BUSY Delay
BUSY to INT Delay
BUSY to CS Delay
CS to RD Setup Time
RD Pulse Width Determined by t
CS to RD Hold Time
Data Access Time after RD; C
Data Access Time after RD; C
RD to INT Delay
RD to BUSY Delay
Data Valid Time after BUSY; C
Data Valid Time after BUSY; C
Test Conditions/Comments
Data Valid to WR Setup Time
Data Valid to WR Hold Time
Bus Relinquish Time after RD
DD
= 5 V
5%; V
WARNING!
b. V
SS
= 0 V or –5 V
OL
ESD SENSITIVE DEVICE
to High-Z
L
L
L
L
= 20 pF
= 100 pF
13
= 100 pF
= 20 pF
.
5%)
REV. B