HFBR-5803AT Avago Technologies US Inc., HFBR-5803AT Datasheet - Page 2
HFBR-5803AT
Manufacturer Part Number
HFBR-5803AT
Description
Manufacturer
Avago Technologies US Inc.
Datasheet
1.HFBR-5803AT.pdf
(15 pages)
Specifications of HFBR-5803AT
Optical Fiber Type
TX/RX
Data Transfer Rate
100Mbps
Optical Rise Time
3/2.2ns
Optical Fall Time
3/2.2ns
Jitter
0.69/2.14ns
Operating Temperature Classification
Commercial
Peak Wavelength
1308/1380nm
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.25V
Output Current
50mA
Operating Temp Range
-10C to 85C
Mounting
Screw
Pin Count
9
Lead Free Status / Rohs Status
Not Compliant
Transmitter Sections
The transmitter section of the HFBR-5803 and HFBR-
5805 series utilize 1300 nm Surface Emitting InGaAsP
LEDs. These LEDs are packaged in the optical subassem-
bly portion of the transmitter section. They are driven
by a custom silicon IC which converts differential PECL
logic signals, ECL referenced (shifted) to a +3.3 V or +5 V
supply, into an analog LED drive current.
Receiver Sections
The receiver sections of the HFBR-5803 and HFBR-5805
series utilize InGaAs PIN photodiodes coupled to a
custom silicon transimpedance preamplifier IC. These
are packaged in the optical subassembly portion of the
receiver.
These PIN/preamplifier combinations are coupled to
a custom quantizer IC which provides the final pulse
shaping for the logic output and the Signal Detect func-
tion. The data output is differential. The signal detect
output is single-ended. Both data and signal detect
outputs are PECL compatible, ECL referenced (shifted)
to a +3.3 V or +5 V power supply.
Package
The overall package concept for the Avago Tech-
nologies transceivers consists of the following basic
elements; two optical subassemblies, an electrical sub-
assembly and the housing as illustrated in Figure 1 and
Figure 1a.
The package outline drawings and pin out are shown
in Figures 2, 2a and 3. The details of this package out-
line and pin out are compliant with the multisource
definition of the 1 x 9 SIP. The low profile of the Avago
Technologies transceiver design complies with the
maximum height allowed for the duplex SC connector
over the entire length of the package.
Figure 1. SC Connector Block Diagram.
DIFFERENTIAL
DATA OUT
SINGLE-ENDED
SIGNAL
DETECT OUT
DIFFERENTIAL
DATA IN
2
ELECTRICAL SUBASSEMBLY
QUANTIZER IC
DRIVER IC
PREAMP IC
TOP VIEW
DUPLEX SC
RECEPTACLE
PIN PHOTODIODE
OPTICAL
SUBASSEMBLIES
LED
The optical subassemblies utilize a high volume assem-
bly process together with low cost lens elements which
result in a cost effective building block.
The electrical subassembly consists of a high volume
multilayer printed circuit board on which the IC chips
and various surface-mounted passive circuit elements
are attached.
The package includes internal shields for the electrical
and optical subassemblies to ensure low EMI emissions
and high immunity to external EMI fields.
The outer housing including the duplex SC connector
receptacle or the duplex ST ports is molded of filled
nonconductive plastic to provide mechanical strength
and electrical isolation. The solder posts of the Avago
Technologies design are isolated from the circuit design
of the transceiver and do not require connection to a
ground plane on the circuit board.
The transceiver is attached to a printed circuit board
with the nine signal pins and the two solder posts which
exit the bottom of the housing. The two solder posts
provide the primary mechanical strength to withstand
the loads imposed on the transceiver by mating with
duplex or simplex SC or ST connectored fiber cables.