HFBR-5803AT Avago Technologies US Inc., HFBR-5803AT Datasheet - Page 6

• Manufacturer Part Number: HFBR-5803AT
• Manufacturer: Avago Technologies US Inc.

Specifications of HFBR-5803AT

• Optical Fiber Type: TX/RX
• Data Transfer Rate: 100Mbps
• Optical Rise Time: 3/2.2ns
• Optical Fall Time: 3/2.2ns
• Jitter: 0.69/2.14ns
• Operating Temperature Classification: Commercial
• Peak Wavelength: 1308/1380nm
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Output Current: 50mA
• Operating Temp Range: -10C to 85C
• Mounting: Screw
• Pin Count: 9
• Lead Free Status / Rohs Status: Not Compliant

Figure 6. Bit Error Rate vs. Relative Receiver Input Optical Power.
Transceiver Jitter Performance
The Avago Technologies­ 1300 nm trans­ceivers­ are de-
s­igned to operate per the s­ys­tem jitter allocations­ s­tated
in Tables­ E1 of Annexes­ E of the FDDI PMD and LCF-PMD
s­tandards­.
The Avago Technologies­ 1300 nm trans­mitters­ will toler-
ate the wors­t cas­e input electrical jitter allowed in thes­e
tables­ without violating the wors­t cas­e output jitter
requirements­ of Sections­ 8.1 Active Output Interface of
the FDDI PMD and LCF-PMD s­tandards­.
The Avago Technologies­ 1300 nm receivers­ will tolerate
the wors­t cas­e input optical jitter allowed in Sections­ 8.2
Active Input Interface of the FDDI PMD and LCF-PMD
s­tandards­ without violating the wors­t cas­e output elec-
trical jitter allowed in the Tables­ E1 of the Annexes­ E.
The jitter s­pecifications­ s­tated in the following 1300 nm
trans­ceiver s­pecification tables­ are derived from the val-
ues­ in Tables­ E1 of Annexes­ E. They repres­ent the wors­t
cas­e jitter contribution that the trans­ceivers­ are allowed
to make to the overall s­ys­tem jitter without violating the
Annex E allocation example. In practice the typical con-
tribution of the Avago Technologies­ trans­ceivers­ is­ well
below thes­e maximum allowed amounts­.
Recommended Handling Precautions
Avago Technologies­ recommends­ that normal s­tatic
precautions­ be taken in the handling and as­s­embly of
thes­e trans­ceivers­ to prevent damage which may be
induced by electros­tatic dis­charge (ESD). The HFBR-
5800 s­eries­ of trans­ceivers­ meet MIL-STD-883C Method
3015.4 Clas­s­ 2 products­.
Care s­hould be us­ed to avoid s­horting the receiver data
or s­ignal detect outputs­ directly to ground without
proper current limiting impedance.
6
1 x 10-10
1 x 10-11
1 x 10-12
1 x 10-2
1 x 10-3
1 x 10-4
1 x 10-5
1 x 10-6
1 x 10-7
1 x 10-8
1 x 10-9
-6
CONDITIONS:
1. 155 MBd
2. PRBS 2
3. CENTER OF SYMBOL SAMPLING
4. T
5. V
6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
RELATIVE INPUT OPTICAL POWER - dB
A
CC
= +25˚C
= 3.3 V to 5 V dc
-4
7
-1
-2
HFBR-5803 SERIES
CENTER OF SYMBOL
0
2
4
Figure 7. Recommended Decoupling and Termination Circuits
NOTES:
THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT THE INPUT
R1 = R4 = R6 = R8 = R10 = 130 OHMS FOR +5.0 V OPERATION, 82 OHMS FOR +3.3 V OPERATION.
R2 = R3 = R5 = R7 = R9 = 82 OHMS FOR +5.0 V OPERATION, 130 OHMS FOR +3.3 V OPERATION.
C1 = C2 = C3 = C5 = C6 = 0.1 µF.
C4 = 10 µF.
L1 = L2 = 1 µH COIL OR FERRITE INDUCTOR.
TERMINATION
AT PHY
DEVICE
INPUTS
OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT
BOARD WITH 50 OHM MICROSTRIP SIGNAL PATHS BE USED.
NO INTERNAL CONNECTION
V
Rx
R6
EE
1
RD
R5
RD
2
V
CC
C6
RD
R7
RD
3
R8
Rx
SD
SD
4
HFBR-5803
TOP VIEW
R10
R9
C1
TRANSCEIVER
V
AT V
C3
Rx
CC
V
5
CC
L1
V
FILTER
CC
CC
PINS
NO INTERNAL CONNECTION
V
Tx
CC
6
C4
L2
Tx
C2
TD
7
TD
TERMINATION
AT TRANSCEIVER
INPUTS
R1
TD
R2
8
V
CC
V
Tx
C5
R3
EE
9
R4
TD