PCI-BOARD/S25 Altera, PCI-BOARD/S25 Datasheet - Page 31

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PCI-BOARD/S25

Manufacturer Part Number
PCI-BOARD/S25
Description
Manufacturer
Altera
Datasheet

Specifications of PCI-BOARD/S25

Lead Free Status / Rohs Status
Supplier Unconfirmed
Altera Corporation
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Upon successful configuration, the configuration done LED (D4)
illuminates.
Refer to Quartus II Help for instructions on how to use the ByteBlaster II
cable.
Configuration from the Flash Memory
The Stratix device is volatile; therefore, it must be configured each time
power is applied to the board. The Stratix PCI development board has a
non-volatile configuration scheme that automatically configures the
Stratix device with a factory default design, or, if selected, a user design,
after power is applied.
Upon power-up, the configuration circuit, comprised of the
EPM3256ATC144 device and flash memory, configures the Stratix device.
If the board settings dip switch bank is set for user configuration, the
circuit attempts to load the specified user design. If the load is
unsuccessful, the configuration done LED (D4) does not illuminate and
the Stratix device is not configured.
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Select ByteBlaster II as the hardware. Search for “Changing the
Hardware Setup” in Quartus II Help for instructions.
Set the mode to JTAG.
Click Start.
If the board is installed into a computer’s PCI slot when it is
configured by the ByteBlaster II cable, the computer system
could lock up. If this happens, reset the computer. Do not
shutdown or the configuration will be lost. Restart the computer
to re-enumerate the PCI bus.
The configuration circuit uses a factory-programmed default
design in the EPM3256ATC144 device. Using the JTAG interface
to program the EPM3256ATC144 device can disable the
configuration circuit, requiring subsequent Stratix
configurations to be performed with the JTAG interface.
The factory-programmed default Stratix configuration image
resides at a fixed location of flash memory. Altering this image
can result in unpredictable board operation upon power-up and
can prevent the configuration circuit from operating, thereby
requiring subsequent Stratix configurations to be performed
with the JTAG interface.
Stratix PCI Development Board Data Sheet
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