MAX5139GTE+T Maxim Integrated Products, MAX5139GTE+T Datasheet - Page 15

• Manufacturer Part Number: MAX5139GTE+T
• Description: IC DAC V-OUT 12BIT 1CH 16-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX5139GTE+T

• Settling Time: 5µs
• Number Of Bits: 12
• Data Interface: DSP, I²C, MICROWIRE™, Parallel, QSPI™, SPI™
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 16-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -

Offset error indicates how well the actual transfer func-
tion matches the ideal transfer function at a single point.
Typically, the point at which the offset error is specified is
at or near the zero-scale point of the transfer function.
Gain error is the difference between the ideal and the
actual full-scale output voltage on the transfer curve,
after nullifying the offset error. This error alters the slope
of the transfer function and corresponds to the same
percentage error in each step.
The settling time is the amount of time required from the
start of a transition, until the DAC output settles to the new
output value within the converter’s specified accuracy.
Digital feedthrough is the amount of noise that appears
on the DAC output when the DAC digital control lines
are toggled.
SCLK
M/Z
DIN
CS
______________________________________________________________________________________
CONVERTER
SERIAL-TO-
PARALLEL
MAX5138
MAX5139
READY
Digital Feedthrough
CONTROL LOGIC
REGISTER
Settling Time
INPUT
POR
Offset Error
Gain Error
Buffered Voltage-Output DACs
Low-Power, Single, 16-/12-Bit,
AVDD
POWER-DOWN
CONTROL
REGISTER
DAC
LDAC
DVDD
A major carry transition occurs at the midscale point
where the MSB changes from low to high and all other
bits change from high to low, or where the MSB
changes from high to low and all other bits change from
low to high. The duration of the magnitude of the
switching glitch during a major carry transition is
referred to as the digital-to-analog glitch impulse.
The digital-to-analog power-up glitch is the duration of
the magnitude of the switching glitch that occurs as the
device exits power-down mode.
PROCESS: BiCMOS
Digital-to-Analog Power-Up Glitch Impulse
AGND
12-/16-BIT
DAC
REFI
AGND
Digital-to-Analog Glitch Impulse
REFERENCE
REFO
Functional Diagram
BUFFER
Chip Information
INTERNAL
BIAS CKT
OUT
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