DS90CF561MTD National Semiconductor, DS90CF561MTD Datasheet - Page 5

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DS90CF561MTD

Manufacturer Part Number
DS90CF561MTD
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of DS90CF561MTD

Number Of Elements
3
Number Of Receivers
21
Number Of Drivers
3
Input Type
CMOS/TTL
Operating Supply Voltage (typ)
5V
Differential Input High Threshold Voltage
100mV
Diff. Input Low Threshold Volt
-100mV
Output Type
Flat Panel Display
Differential Output Voltage
450mV
Power Dissipation
1.98W
Operating Temp Range
-10C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Package Type
TSSOP
Lead Free Status / Rohs Status
Not Compliant

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TCCD
TPLLS
TPDD
CLHT
CHLT
RCOP
RSKM
RCOH
RCOL
RSRC
RHRC
RCCD
RPLLS
RPDD
Symbol
Symbol
Over recommended operating supply and temperature ranges unless otherwise specified
Over recommended operating supply and temperature ranges unless otherwise specified
Transmitter Switching Characteristics
Note 5: This limit based on bench characterization.
Receiver Switching Characteristics
Note 6: Receiver Skew Margin is defined as the valid data sampling region at the receiver inputs. This margin takes into account for transmitter output skew(TCCS)
and the setup and hold time (internal data sampling window), allowing LVDS cable skew dependent on type/length and source clock(TxCLK IN) jitter.
RSKM
AC Timing Diagrams
cable skew (type, length) + source clock jitter (cycle to cycle)
TxCLK IN to TxCLK OUT Delay
V
Transmitter Phase Lock Loop Set ( Figure 11 )
Transmitter Powerdown Delay ( Figure 15 )
CMOS/TTL Low-to-High Transition Time ( Figure 4 )
CMOS/TTL High-to-Low Transition Time ( Figure 4 )
RxCLK OUT Period ( Figure 8 )
Receiver Skew Margin (Note 6). V
RxCLK OUT High Time ( Figure 8 )
RxCLK OUT Low Time ( Figure 8 )
RxOUT Setup to RxCLK OUT ( Figure 8 )
RxOUT Hold to RxCLK OUT ( Figure 8 )
RxCLK IN to RxCLK OUT Delay
V
Receiver Phase Lock Loop Set ( Figure 12 )
Receiver Powerdown Delay ( Figure 16 )
CC
CC
= 5.0V ( Figure 9 )
= 5.0V ( Figure 10 )
@
@
FIGURE 1. “Worst Case” Test Pattern
CC
25˚C,
25˚C,
Parameter
Parameter
= 5V, T
A
= 25˚C ( Figure 18 )
5
(Continued)
f = 20 MHz
f = 40 MHz
f = 20 MHz
f = 40 MHz
f = 20 MHz
f = 40 MHz
f = 20 MHz
f = 40 MHz
f = 20 MHz
f = 40 MHz
Min
21.5
10.5
Min
700
1.1
4.5
6.5
7.6
25
19
14
16
5
6
Typ
Typ
3.5
2.7
T
DS012485-5
Max
11.9
Max
100
6.5
6.5
9.7
50
10
10
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1
Units
Units
ms
ms
ns
ns
ns
ns
ns
ns
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs

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