© 2006 National Semiconductor Corporation
LMH0030 or LMH0031
Control Port Bussed
Operation
Introduction
In systems using multiple LMH0030 serializer and LMH0031
deserializer devices, it is often convenient to connect their
ancillary data/control ports to a host controller using a bus
network. This reduces the amount of wiring and PCB area
required for this function. When designing such a network, it
is necessary to understand how the devices are controlled
and used in a manner similar to microprocessor peripheral
devices.
LMH0030 AD Port
The LMH0030 ancillary/control data port provides read/write
access to the device’s control data registers. It can also
accept parallel ancillary data as input. The port is controlled
by three signals: ANC/CTRL, RD/WR and A
two distinct functions and works differently in the ANC and
CTRL modes. In CTRL-Write mode, A
ister addresses and data into the device. In CTRL-Read
mode, A
port to address input mode after register output data has
been read by the host. In ANC-Write mode, A
ancillary data into the device. There is no ANC-Read mode.
A
execution. Each control read or write cycle requires two A
cycles for completion.
In the control data mode, when multiple devices are bussed,
a means of selecting the particular device to be addressed is
needed. Since the LMH0030 and LMH0031 do not have
chip-select inputs, controlling access to the control signals
provides the means of addressing a particular device on the
CLK
is the primary controlling signal affecting device control
CLK
loads control register addresses and returns the
CLK
AN201105
loads control reg-
CLK
. A
CLK
CLK
strobes
serves
CLK
National Semiconductor
Application Note 1336
Jim Mears
July 2006
bus network. The simplest means of controlling access to a
particular device uses only A
ANC/CTRL port will not respond unless A
when the port control address or data are valid.
LMH0031 AD Port
The ancillary/control data port of the LMH0031 operates
identically to that of the LMH0030 with one exception: There
is no ANC-Write mode since the device can only output
ancillary data. Bussing the control port functions is the same
as described previously.
Multiplexing ACLK as Chip-select
A
basic logic for doing this is shown in Figure 1. This function
can be implemented in a variety of ways, of course. The logic
can be discrete, a portion of an FPGA or the functions can be
incorporated into a microcontroller.
To accommodate situations where it is desired to write the
same data simultaneously to all of the LMH0030s or
LMH0031s, the multiplexer logic can incorporate a broadcast
control function as shown in Figure 2. This function saves
time by reducing the number of cycles otherwise needed to
load the devices individually. The broadcast input overrides
the select inputs, S0 and S1. Naturally, this function can only
be used to access and write identical information to the
same control register in all devices. The broadcast function
cannot be used to read simultaneously from all devices as
this would cause output drive conflicts.
CLK
may be multiplexed to function as a chip-select. The
CLK
. This is possible since the
CLK
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is toggled
