STK16C88-W35 Cypress Semiconductor Corp, STK16C88-W35 Datasheet - Page 8

• Manufacturer Part Number: STK16C88-W35
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of STK16C88-W35

• Word Size: 8b
• Organization: 32Kx8
• Density: 256Kb
• Interface Type: Parallel
• Access Time (max): 35ns
• Operating Supply Voltage (typ): 5V
• Package Type: PDIP
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temp Range: 0C to 70C
• Pin Count: 28
• Mounting: Through Hole
• Supply Current: 80mA
• Lead Free Status / Rohs Status: Not Compliant

STK16C88
February 2002
The software sequence must be clocked with E
controlled
Once the sixth address in the sequence has been
entered, the
chip will be disabled. It is important that
cycles and not
sequence, although it is not necessary that G be
low for the sequence to be valid. After the t
cycle time has been fulfilled, the
activated for
SOFTWARE NONVOLATILE RECALL
A software
sequence of
to the software
RECALL
operations must be performed:
Internally,
the
1. Read address
2. Read address
3. Read address
4. Read address
5. Read address
6. Read address
1. Read address
2. Read address
3. Read address
4. Read address
5. Read address
6. Read address
SRAM
100
80
60
40
20
0
cycle, the following sequence of
data is cleared, and second, the nonvola-
READ
RECALL
READ
STORE
READ
RECALL
Figure 2: I
50
s.
STORE
WRITE
and
is a two-step procedure. First,
operations in a manner similar
0E38 (hex)
31C7 (hex)
03E0 (hex)
3C1F (hex)
303F (hex)
0FC0 (hex)
0E38 (hex)
31C7 (hex)
03E0 (hex)
3C1F (hex)
303F (hex)
0C63 (hex)
cycle will commence and the
Cycle Time (ns)
100
CC
WRITE
cycle is initiated with a
(max) Reads
cycles be used in the
initiation. To initiate the
150
operation.
SRAM
TTL
CMOS
Valid READ
Valid READ
Valid READ
Valid READ
Valid READ
Initiate STORE cycle
Valid READ
Valid READ
Valid READ
Valid READ
Valid READ
Initiate RECALL cycle
200
will again be
READ
READ
STORE
5-72
tile information is transferred into the
After the t
be ready for
RECALL
EEPROM
an unlimited number of times.
HARDWARE PROTECT
The STK16C88 offers hardware protection against
inadvertent
during low-voltage conditions. When V
all software
are inhibited.
LOW AVERAGE ACTIVE POWER
The STK16C88 draws significantly less current
when it is cycled at times longer than 50ns. Figure 2
shows the relationship between I
time. Worst-case current consumption is shown for
both
perature range, V
chip enable). Figure 3 shows the same relationship
for
less than 100%, only standby current is drawn
when the chip is disabled. The overall average cur-
rent drawn by the STK16C88 depends on the fol-
lowing items: 1)
duty cycle of chip enable; 3) the overall cycle rate
for accesses; 4) the ratio of
the operating temperature; 6) the V
O loading.
WRITE
CMOS
100
80
60
40
20
0
operation in no way alters the data in the
cells. The nonvolatile data can be recalled
RECALL
cycles. If the chip enable duty cycle is
and
STORE
STORE
Figure 3: I
READ
cycle time the
50
TTL
CMOS
CC
operation and
operations and
input levels (commercial tem-
= 5.5V, 100% duty cycle on
and
Cycle Time (ns)
CC
100
vs.
(max) Writes
WRITE
TTL
READ
SRAM
150
input levels; 2) the
TTL
CMOS
CC
CC
operations. The
s to
and
will once again
SRAM WRITE
SRAM WRITE
level; and 7) I/
200
CC
SRAM
READ
WRITE
< V
SWITCH
cells.
cycle
s; 5)
s
s
,