LCMXO640C-3MN132C Lattice, LCMXO640C-3MN132C Datasheet - Page 96

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LCMXO640C-3MN132C

Manufacturer Part Number
LCMXO640C-3MN132C
Description
CPLD MachXO Family 320 Macro Cells 1.8V/2.5V/3.3V 132-Pin CSBGA Tray
Manufacturer
Lattice
Series
MachXOr

Specifications of LCMXO640C-3MN132C

Package
132CSBGA
Family Name
MachXO
Number Of Macro Cells
320
Maximum Propagation Delay Time
4.9 ns
Number Of User I/os
101
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Memory Type
SRAM
Operating Temperature
0 to 85 °C
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
4.9ns
Voltage Supply - Internal
1.71 V ~ 3.465 V
Number Of Logic Elements/blocks
-
Number Of Macrocells
320
Number Of Gates
-
Number Of I /o
101
Mounting Type
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LCMXO640C-3MN132C
Manufacturer:
Semtech
Quantity:
932
Part Number:
LCMXO640C-3MN132C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
November 2006
December 2006
November 2007
February 2007
August 2007
June 2009
July 2010
Date
Version
02.3
02.4
02.5
02.6
02.7
02.8
02.9
Ordering Information
Pinout Information
Pinout Information
Pinout Information
DC and Switching
DC and Switching
DC and Switching
DC and Switching
Characteristics
Characteristics
Characteristics
Characteristics
Supplemental
Architecture
Architecture
Introduction
Information
Section
Corrections to MachXO “C” Sleep Mode Timing table - value for
t
(100ns) changed from min. to max.
Added Flash Download Time table.
EBR Asynchronous Reset section added.
Power Supply and NC table: Pin/Ball orientation footnotes added.
Updated EBR Asynchronous Reset section.
Updated sysIO Single-Ended DC Electrical Characteristics table.
Added JTAG Port Timing Waveforms diagram.
Added Thermal Management text section.
Updated title list.
Added 0.8-mm 256-pin caBGA package to MachXO Family Selection
Guide table.
Added Logic Signal Connections table for 0.8-mm 256-pin caBGA pack-
age.
Updated Part Number Description diagram and Ordering Part Number
tables with 0.8-mm 256-pin caBGA package information.
Updated sysCLOCK PLL Timing table.
WSLEEPN
7-3
(400ns) changed from max. to min. Value for t
Change Summary
MachXO Family Data Sheet
Revision History
WAWAKE

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