EPM9320LC84-15 Altera, EPM9320LC84-15 Datasheet - Page 4
![IC MAX 9000 CPLD 320 84-PLCC](/photos/6/70/67059/544-84-plcc_sml.jpg)
EPM9320LC84-15
Manufacturer Part Number
EPM9320LC84-15
Description
IC MAX 9000 CPLD 320 84-PLCC
Manufacturer
Altera
Series
MAX® 9000r
Datasheet
1.EPM9320LC84-15.pdf
(46 pages)
Specifications of EPM9320LC84-15
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
15.0ns
Voltage Supply - Internal
4.75 V ~ 5.25 V
Number Of Logic Elements/blocks
20
Number Of Macrocells
320
Number Of Gates
6000
Number Of I /o
60
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
84-PLCC
Voltage
3.3V/5V
Memory Type
EEPROM
Number Of Logic Elements/cells
20
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
544-2362-5
Available stocks
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MAX 9000 Programmable Logic Device Family Data Sheet
4
All MAX 9000 device packages provide four dedicated inputs for global
control signals with large fan-outs. Each I/O pin has an associated I/O
cell register with a clock enable control on the periphery of the device. As
outputs, these registers provide fast clock-to-output times; as inputs, they
offer quick setup times.
MAX 9000 EPLDs provide 5.0-V in-system programmability (ISP). This
feature allows the devices to be programmed and reprogrammed on the
printed circuit board (PCB) for quick and efficient iterations during design
development and debug cycles. MAX 9000 devices are guaranteed for 100
program and erase cycles.
MAX 9000 EPLDs contain 320 to 560 macrocells that are combined into
groups of 16 macrocells, called logic array blocks (LABs). Each macrocell
has a programmable-AND/fixed-OR array and a configurable register with
independently programmable clock, clock enable, clear, and preset
functions. For increased flexibility, each macrocell offers a dual-output
structure that allows the register and the product terms to be used
independently. This feature allows register-rich and combinatorial-
intensive designs to be implemented efficiently. The dual-output
structure of the MAX 9000 macrocell also improves logic utilization, thus
increasing the effective capacity of the devices. To build complex logic
functions, each macrocell can be supplemented with both shareable
expander product terms and high-speed parallel expander product terms
to provide up to 32 product terms per macrocell.
The MAX 9000 family provides programmable speed/power
optimization. Speed-critical portions of a design can run at high
speed/full power, while the remaining portions run at reduced
speed/low power. This speed/power optimization feature enables the
user to configure one or more macrocells to operate at 50% or less power
while adding only a nominal timing delay. MAX 9000 devices also
provide an option that reduces the slew rate of the output buffers,
minimizing noise transients when non-speed-critical signals are
switching. MAX 9000 devices offer the MultiVolt feature, which allows
output drivers to be set for either 3.3-V or 5.0-V operation in mixed-
voltage systems.
Altera Corporation