XC9536XL-5VQG44C Xilinx Inc, XC9536XL-5VQG44C Datasheet - Page 3

IC CPLD 36 MCELL 3.3V 44-VQFP

XC9536XL-5VQG44C

Manufacturer Part Number
XC9536XL-5VQG44C
Description
IC CPLD 36 MCELL 3.3V 44-VQFP
Manufacturer
Xilinx Inc
Series
XC9500XLr
Datasheet

Specifications of XC9536XL-5VQG44C

Programmable Type
In System Programmable (min 10K program/erase cycles)
Delay Time Tpd(1) Max
5.0ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
2
Number Of Macrocells
36
Number Of Gates
800
Number Of I /o
34
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-TQFP, 44-VQFP
Voltage
3.3V
Memory Type
FLASH
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Number Of Logic Elements/cells
-
Other names
122-1465

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC9536XL-5VQG44C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC9536XL-5VQG44C
Manufacturer:
XILINX
0
Part Number:
XC9536XL-5VQG44C
Manufacturer:
XILINX
0
Component Availability
Ordering Information
XA9500XL Automotive Requirements and Recommendations
Requirements
The following requirements are for all automotive applica-
tions:
1. All automotive customers are required to keep the
2. Use a monotonic, fast ramp power supply to power up
3. Do not float I/O pins during device operation. Floating
DS108-1 (v1.7) April 3, 2007
Product Specification
Notes:
1.
2.
3.
Device Ordering Options
XA9536XL
XA9572XL
XA95144XL
XA95144XL
Macrocell Power selection set to low, and the Logic
Optimization set to density when designing with ISE
software. These are the default settings when
XA9500XL devices are selected for design. These
settings are found on the Process Properties page for
Implement Design. See the ISE Online Help for details
on these properties.
XA9500XL . A V
required.
I/O pins can increase I
1-2 mA per floating input. In addition, when I/O pins are
XA9536XL
XA9572XL
Q = Automotive Extended Temperature (T
I = Automotive Industrial Temperature (T
All packages Pb-free.
Device
R
Code
Type
Pins
-15 15.5 ns pin-to-pin
CC
delay
ramp time of less than 1 ms is
Speed
-15
-15
-15
Device Type
Speed Grade
CC
Example:
as input buffers will draw
Quad Flat Pack
VQG44
TQG100 100-pin Thin Quad Flat Pack (TQFP)
CSG144 144-pin Chip Scale Package (CSP)
A
VQG44 44-pin Quad Flat Pack (VQFP)
VQG64 64-pin Quad Flat Pack (VQFP)
A
= –40°C to +85°C).
I,Q
I,Q
44
XA9572XL -15 VQG 44Q
--
= –40°C to +105°C).
www.xilinx.com
Quad Flat Pack
Package
VQG64
I,Q
64
4. Do not drive I/O pins without V
5. Sink current when driving LEDs. Because all Xilinx
6. Avoid external pull-down resistors. Always use external
--
--
floated, noise can propagate to the center of the CPLD.
I/O pins should be appropriately terminated with
keeper/bus-hold. Unused I/Os can also be configured
as C
CPLDs have N-channel pull-down transistors on
outputs, it is required that an LED anode is sourced
through a resistor externally to V
will give the brightest solution.
pull-up resistors if external termination is required. This
is because the XA9500XL Automotive CPLD, which
includes some I/O driving circuits beyond the input and
output buffers, may have contention with external
pull-down resistors, and, consequently, the I/O will not
switch as expected.
GND
XA9500XL Automotive CPLD Product Family
Thin Quad Flat Pack
(programmable GND).
TQG100
Temperature Range
Number of Pins
Pb-free
Package Type
100
I-Grade
Q-Grade
I,Q
--
--
Temperature
T
T
T
CC
A
A
J
CC
Chip Scale Package
Maximum = 125°C
= –40°C to +85°C
= –40°C to +105°C with
/V
. Consequently, this
CCIO
CSG144
powered.
144
--
--
I
3

Related parts for XC9536XL-5VQG44C