ATF750CL-15JU Atmel, ATF750CL-15JU Datasheet - Page 14
![IC PLD HS 750 GATE 5.0V 28-PLCC](/photos/6/70/67044/453-28-plcc_sml.jpg)
ATF750CL-15JU
Manufacturer Part Number
ATF750CL-15JU
Description
IC PLD HS 750 GATE 5.0V 28-PLCC
Manufacturer
Atmel
Series
ATF750C(L)r
Datasheet
1.ATF750C-7JC.pdf
(25 pages)
Specifications of ATF750CL-15JU
Programmable Type
In System Programmable (min 1K program/erase cycles)
Delay Time Tpd(1) Max
15.0ns
Voltage Supply - Internal
4.5 V ~ 5.5 V
Number Of Macrocells
10
Number Of I /o
10
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
Features
Programmable
Voltage
5V
Memory Type
CMOS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Logic Elements/cells
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATF750CL-15JU
Manufacturer:
ATMEL
Quantity:
1
29. Preload of Registered Outputs
14
ATF750C(L)
The ATF750C(L)’s registers are provided with circuitry to allow loading of each register asyn-
chronously with either a high or a low. This feature will simplify testing since any state can be
forced into the registers to control test sequencing. A V
ter high; a V
by placing a 10.25V to 10.75V signal on pin 8 on DIPs, and lead 10 on SMDs. When the clock
term is pulsed high, the data on the I/O pins is placed into the register chosen by the select pin
.
Output Pin during Preload Cycle
Level Forced on Registered
IL
will force it low, independent of the output polarity. The PRELOAD state is entered
V
V
V
V
IH
IH
IL
IL
Select Pin
State
High
High
Low
Low
IH
Register #0 State
level on the I/O pin will force the regis-
after Cycle
High
Low
X
X
Register #1 State
after Cycle
0776L–PLD–11/08
High
Low
X
X