ATF750CL-15XC ATMEL Corporation, ATF750CL-15XC Datasheet
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ATF750CL-15XC
Manufacturer Part Number
ATF750CL-15XC
Description
Manufacturer
ATMEL Corporation
Specifications of ATF750CL-15XC
Date_code
0125+
Packing_info
SSOP-24
Features
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Block Diagram
Pin Configurations
Note:
Pin
CLK
IN
I/O
GND
VCC
Advanced, High-speed, Electrically-erasable Programmable Logic Device
Low-power Edge-sensing “L” Option with 1 mA Standby Current
D- or T-type Flip-flop
Product Term or Direct Input Pin Clocking for Flip-flop
7.5 ns Maximum Pin-to-pin Delay with 5V Operation
Highest Density Programmable Logic Available in 24-pin and 28-pin Packages
Increased Logic Flexibility
Enhanced Output Logic Flexibility
Programmable Pin-keeper Circuits
Dual-in-line and Surface Mount Package in Standard Pinouts
Full Military, Commercial and Industrial Temperature Ranges
20-year Data Retention
2000V ESD Protection
1000 Erase/Write Cycles
Green Package Options (Pb/Halide-free/RoHS Compliant) Available
– Superset of 22V10
– Enhanced Logic Flexibility
– Backward Compatible with ATV750B/BL and ATV750/L
– Advanced Electrically-erasable Technology
– Reprogrammable
– 100% Tested
– 42 Array Inputs, 20 Sum Terms and 20 Flip-flops
– All 20 Flip-flops Feed Back Internally
– 10 Flip-flops are also Available as Outputs
INPUT
For PLCC, pins 1, 8, 15, and 22
can be left unconnected. For
superior performance, connect
VCC to pin 1 and GND to pins
8, 15, and 22.
PINS
12
Function
Clock
Logic Inputs
Bi-directional Buffers
Ground
+5V Supply
PROGRAMMABLE
COMBINATORIAL
INTERCONNECT
LOGIC ARRAY
AND
PRODUCT
TERMS
4 TO 8
(CLOCK PIN)
CLK/IN
DIP/SOIC/TSSOP
GND
(OE PRODUCT TERMS)
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
FLIP-FLOPS)
1
2
3
4
5
6
7
8
9
10
11
12
OPTION
(UP T0 20
LOGIC
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
OUTPUT
OPTION
GND *
IN
IN
IN
IN
IN
IN
5
6
7
8
9
10
11
PLCC/LCC
PINS
I/O
10
25
24
23
22
21
20
19
I/O
I/O
I/O
GND *
I/O
I/O
I/O
High-speed
Complex
Programmable
Logic Device
ATF750C
ATF750CL
0776K–PLD–07/07