EPM240T100C5 Altera, EPM240T100C5 Datasheet - Page 33

• Manufacturer Part Number: EPM240T100C5
• Description: IC MAX II CPLD 240 LE 100-TQFP
• Manufacturer: Altera
• Series: MAX® IIr

Specifications of EPM240T100C5

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 4.7ns
• Voltage Supply - Internal: 2.5V, 3.3V
• Number Of Logic Elements/blocks: 240
• Number Of Macrocells: 192
• Number Of I /o: 80
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Voltage: 2.5V, 3.3V
• Memory Type: FLASH
• Number Of Logic Elements/cells: 240
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: 544-1146

Chapter 2: MAX II Architecture
I/O Structure
Figure 2–20. Row I/O Block Connection to the Interconnect
Note to
(1) Each of the seven IOEs in the row I/O block can have one data_out or fast_out output, one OE output, and one data_in input.
© October 2008 Altera Corporation
Figure
2–20:
LAB Local
Interconnect
Figure 2–20
R4 Interconnects
to Adjacent LAB
Interconnect
Direct Link
LAB
shows how a row I/O block connects to the logic array.
from Adjacent LAB
Interconnect
C4 Interconnects
Direct Link
data_in[6..0]
(Note 1)
LAB Column
clock [3..0]
I/O Block Local
Interconnect
data_out
7
7
fast_out
7
7
[6..0]
[6..0]
[6..0]
OE
Contains up to
Row I/O Block
I/O Block
Seven IOEs
Row
MAX II Device Handbook
2–25