EPM570GT100C5N Altera, EPM570GT100C5N Datasheet - Page 64
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EPM570GT100C5N
Manufacturer Part Number
EPM570GT100C5N
Description
IC MAX II CPLD 570 LE 100-TQFP
Manufacturer
Altera
Series
MAX® IIr
Specifications of EPM570GT100C5N
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
5.4ns
Voltage Supply - Internal
1.71 V ~ 1.89 V
Number Of Logic Elements/blocks
570
Number Of Macrocells
440
Number Of I /o
76
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Voltage
1.8V
Memory Type
FLASH
Number Of Logic Elements/cells
570
Family Name
MAX II
# Macrocells
440
Frequency (max)
1.8797GHz
Propagation Delay Time
8.7ns
Number Of Logic Blocks/elements
57
# I/os (max)
76
Operating Supply Voltage (typ)
1.8V
In System Programmable
Yes
Operating Supply Voltage (min)
1.71V
Operating Supply Voltage (max)
1.89V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1405
EPM570GT100C5N
EPM570GT100C5N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM570GT100C5N
Manufacturer:
INTEL
Quantity:
1 235
5–6
Table 5–6. 3.3-V LVCMOS Specifications (Part 2 of 2)
Table 5–7. 2.5-V I/O Specifications
Table 5–8. 1.8-V I/O Specifications
Table 5–9. 1.5-V I/O Specifications
MAX II Device Handbook
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Notes to
(1) This specification is supported across all the programmable drive strength settings available for this I/O standard, as shown
(2) This maximum V
OH
OL
CCIO
IH
IL
OH
OL
C CIO
IH
IL
OH
OL
C CIO
IH
IL
OH
OL
Symbol
Symbol
Symbol
Symbol
in the
by the V
Table 5–5
MAX II Architecture
I
parameter in
High-level output voltage
Low-level output voltage
I/O supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
I/O supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
I/O supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
through
IH
reflects the JEDEC specification. The MAX II input buffer can tolerate a V
Parameter
Parameter
Table
Parameter
Parameter
Table
chapter (I/O Structure section) in the MAX II Device Handbook.
5–2.
5–9:
IOH = –0.1 mA
IOH = –0.1 mA
IOL = 0.1 mA
IOL = 0.1 mA
IOH = –1 mA
IOH = –2 mA
IOL = 1 mA
IOL = 2 mA
IOH = –2 mA
IOH = –2 mA
Conditions
IOL = 2 mA
IOL = 2 mA
V
V
Conditions
C CIO
C CIO
Conditions
Conditions
—
—
—
= 3.0,
= 3.0,
—
—
—
—
—
—
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
V
Minimum
0.65 × V
0.75 × V
C CIO
Minimum
0.65 × V
V
Minimum
Minimum
C CIO
2.375
—
–0.5
1.425
–0.3
1.7
2.1
2.0
1.7
1.71
–0.3
– 0.2
—
—
—
—
—
– 0.45
C CIO
C CIO
CCIO
IH
maximum of 4.0, as specified
Maximum
Chapter 5: DC and Switching Characteristics
V
Maximum
0.35 × V
0.25 × V
0.35 × V
C CIO
Maximum
Maximum
0.2
2.625
2.25
—
1.575
4.0
0.7
0.2
0.4
0.7
—
—
—
1.89
0.45
+ 0.3
—
—
(2)
© August 2009 Altera Corporation
C CIO
C CIO
C CIO
(2)
Unit
Unit
V
V
Unit
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Operating Conditions