EPM9560ARI208-10 Altera, EPM9560ARI208-10 Datasheet - Page 14

IC MAX 9000 CPLD 560 208-RQFP

EPM9560ARI208-10

Manufacturer Part Number
EPM9560ARI208-10
Description
IC MAX 9000 CPLD 560 208-RQFP
Manufacturer
Altera
Series
MAX® 9000r
Datasheet

Specifications of EPM9560ARI208-10

Programmable Type
In System Programmable
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
4.5 V ~ 5.5 V
Number Of Logic Elements/blocks
35
Number Of Macrocells
560
Number Of Gates
12000
Number Of I /o
153
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
208-RQFP
Voltage
3.3V/5V
Memory Type
EEPROM
Number Of Logic Elements/cells
35
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
544-2364

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MAX 9000 Programmable Logic Device Family Data Sheet
Figure 7. MAX 9000 LAB Connections to Row & Column Interconnect
14
Dual-output
macrocell feeds
both FastTrack
Interconnect and
LAB local array.
96 Row Channels
LAB
Each macrocell drives
one row channel.
Macrocell 1
Macrocell 2
Each row of LABs has a dedicated row interconnect that routes signals
both into and out of the LABs in the row. The row interconnect can then
drive I/O pins or feed other LABs in the device. Each row interconnect has
a total of 96 channels.
column interconnect.
Each macrocell in the LAB can drive one of three separate column
interconnect channels. The column channels run vertically across the
entire device, and are shared by the macrocells in the same column. The
MAX+PLUS II Compiler optimizes connections to a column channel
automatically.
To LAB
Local Array
Figure 7
Additional multiplexer provides
column-to-row path if
macrocell drives row channel.
shows how a macrocell drives the row and
Each macrocell drives one
of three column channels.
48 Column
Channels
Altera Corporation

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