XA9572XL-15TQG100Q Xilinx Inc, XA9572XL-15TQG100Q Datasheet - Page 3

• Manufacturer Part Number: XA9572XL-15TQG100Q
• Description: IC CPLD 3.3V 72MCELL 100-TQFP
• Manufacturer: Xilinx Inc
• Series: XA9500XL XAr

Specifications of XA9572XL-15TQG100Q

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 15.5ns
• Voltage Supply - Internal: 3 V ~ 3.6 V
• Number Of Logic Elements/blocks: 4
• Number Of Macrocells: 72
• Number Of Gates: 1600
• Number Of I /o: 72
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Features: Automotive
• Voltage: 3.0 V ~ 3.6 V
• Memory Type: CMOS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Logic Elements/cells: -

Component Availability
Ordering Information
XA9500XL Automotive Requirements and Recommendations
Requirements
The following requirements are for all automotive applica-
tions:
1. All automotive customers are required to keep the
2. Use a monotonic, fast ramp power supply to power up
3. Do not float I/O pins during device operation. Floating
DS108-1 (v1.7) April 3, 2007
Product Specification
Notes:
1.
2.
3.
Device Ordering Options
XA9536XL
XA9572XL
XA95144XL
XA95144XL
Macrocell Power selection set to low, and the Logic
Optimization set to density when designing with ISE
software. These are the default settings when
XA9500XL devices are selected for design. These
settings are found on the Process Properties page for
Implement Design. See the ISE Online Help for details
on these properties.
XA9500XL . A V
required.
I/O pins can increase I
1-2 mA per floating input. In addition, when I/O pins are
XA9536XL
XA9572XL
Q = Automotive Extended Temperature (T
I = Automotive Industrial Temperature (T
All packages Pb-free.
Device
R
Code
Type
Pins
-15 15.5 ns pin-to-pin
CC
delay
ramp time of less than 1 ms is
Speed
-15
-15
-15
Device Type
Speed Grade
CC
Example:
as input buffers will draw
Quad Flat Pack
VQG44
TQG100 100-pin Thin Quad Flat Pack (TQFP)
CSG144 144-pin Chip Scale Package (CSP)
A
VQG44 44-pin Quad Flat Pack (VQFP)
VQG64 64-pin Quad Flat Pack (VQFP)
A
= –40°C to +85°C).
I,Q
I,Q
44
XA9572XL -15 VQG 44Q
--
= –40°C to +105°C).
www.xilinx.com
Quad Flat Pack
Package
VQG64
I,Q
64
4. Do not drive I/O pins without V
5. Sink current when driving LEDs. Because all Xilinx
6. Avoid external pull-down resistors. Always use external
--
--
floated, noise can propagate to the center of the CPLD.
I/O pins should be appropriately terminated with
keeper/bus-hold. Unused I/Os can also be configured
as C
CPLDs have N-channel pull-down transistors on
outputs, it is required that an LED anode is sourced
through a resistor externally to V
will give the brightest solution.
pull-up resistors if external termination is required. This
is because the XA9500XL Automotive CPLD, which
includes some I/O driving circuits beyond the input and
output buffers, may have contention with external
pull-down resistors, and, consequently, the I/O will not
switch as expected.
GND
XA9500XL Automotive CPLD Product Family
Thin Quad Flat Pack
(programmable GND).
TQG100
Temperature Range
Number of Pins
Pb-free
Package Type
100
I-Grade
Q-Grade
I,Q
--
--
Temperature
T
T
T
CC
A
A
J
CC
Chip Scale Package
Maximum = 125°C
= –40°C to +85°C
= –40°C to +105°C with
/V
. Consequently, this
CCIO
CSG144
powered.
144
--
--
I
3